| Message ID | 20221230162419.3106998-1-richard.henderson@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/microblaze: Add gdbstub xml | expand |
On Fri, Dec 30, 2022 at 08:24:19AM -0800, Richard Henderson wrote: > Mirroring the upstream gdb xml files, the two stack boundary > registers are separated out. Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > > I did this thinking I would be fixing: > > TEST basic gdbstub support on microblaze > Truncated register 35 in remote 'g' packet > Traceback (most recent call last): > File "/home/rth/qemu/src/tests/tcg/multiarch/gdbstub/sha1.py", > line 71, in <module> if gdb.parse_and_eval('$pc') == 0: > gdb.error: No registers. > > but in the end it turned out that the gdb-multiarch supplied > by ubuntu 22.04 simply doesn't support MicroBlaze, as can be > seen with the "set architecture" command within gdb. > > (I built gdb from source, to try and debug why this still wasn't > working, only to find that it did. :-P) > > Alex, any way to modify our gdb test to fail gracefully here? > > Regardless, having proper xml for all of our targets seems > like the correct way forward. > > > r~ > > Cc: Alex Bennée <alex.bennee@linaro.org> > Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> > --- > configs/targets/microblaze-linux-user.mak | 1 + > configs/targets/microblaze-softmmu.mak | 1 + > configs/targets/microblazeel-linux-user.mak | 1 + > configs/targets/microblazeel-softmmu.mak | 1 + > target/microblaze/cpu.h | 2 + > target/microblaze/cpu.c | 7 ++- > target/microblaze/gdbstub.c | 51 +++++++++++----- > gdb-xml/microblaze-core.xml | 67 +++++++++++++++++++++ > gdb-xml/microblaze-stack-protect.xml | 12 ++++ > 9 files changed, 128 insertions(+), 15 deletions(-) > create mode 100644 gdb-xml/microblaze-core.xml > create mode 100644 gdb-xml/microblaze-stack-protect.xml > > diff --git a/configs/targets/microblaze-linux-user.mak b/configs/targets/microblaze-linux-user.mak > index 4249a37f65..0a2322c249 100644 > --- a/configs/targets/microblaze-linux-user.mak > +++ b/configs/targets/microblaze-linux-user.mak > @@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common > TARGET_SYSTBL=syscall.tbl > TARGET_BIG_ENDIAN=y > TARGET_HAS_BFLT=y > +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml > diff --git a/configs/targets/microblaze-softmmu.mak b/configs/targets/microblaze-softmmu.mak > index 8385e2d333..e84c0cc728 100644 > --- a/configs/targets/microblaze-softmmu.mak > +++ b/configs/targets/microblaze-softmmu.mak > @@ -2,3 +2,4 @@ TARGET_ARCH=microblaze > TARGET_BIG_ENDIAN=y > TARGET_SUPPORTS_MTTCG=y > TARGET_NEED_FDT=y > +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml > diff --git a/configs/targets/microblazeel-linux-user.mak b/configs/targets/microblazeel-linux-user.mak > index d0e775d840..270743156a 100644 > --- a/configs/targets/microblazeel-linux-user.mak > +++ b/configs/targets/microblazeel-linux-user.mak > @@ -2,3 +2,4 @@ TARGET_ARCH=microblaze > TARGET_SYSTBL_ABI=common > TARGET_SYSTBL=syscall.tbl > TARGET_HAS_BFLT=y > +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml > diff --git a/configs/targets/microblazeel-softmmu.mak b/configs/targets/microblazeel-softmmu.mak > index af40391f2f..9b688036bd 100644 > --- a/configs/targets/microblazeel-softmmu.mak > +++ b/configs/targets/microblazeel-softmmu.mak > @@ -1,3 +1,4 @@ > TARGET_ARCH=microblaze > TARGET_SUPPORTS_MTTCG=y > TARGET_NEED_FDT=y > +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml > diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h > index 1e84dd8f47..e541fbb0b3 100644 > --- a/target/microblaze/cpu.h > +++ b/target/microblaze/cpu.h > @@ -367,6 +367,8 @@ hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, > MemTxAttrs *attrs); > int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > +int mb_cpu_gdb_read_stack_protect(CPUArchState *cpu, GByteArray *buf, int reg); > +int mb_cpu_gdb_write_stack_protect(CPUArchState *cpu, uint8_t *buf, int reg); > > static inline uint32_t mb_cpu_read_msr(const CPUMBState *env) > { > diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c > index 817681f9b2..a2d2f5c340 100644 > --- a/target/microblaze/cpu.c > +++ b/target/microblaze/cpu.c > @@ -28,6 +28,7 @@ > #include "qemu/module.h" > #include "hw/qdev-properties.h" > #include "exec/exec-all.h" > +#include "exec/gdbstub.h" > #include "fpu/softfloat-helpers.h" > > static const struct { > @@ -294,6 +295,9 @@ static void mb_cpu_initfn(Object *obj) > CPUMBState *env = &cpu->env; > > cpu_set_cpustate_pointers(cpu); > + gdb_register_coprocessor(CPU(cpu), mb_cpu_gdb_read_stack_protect, > + mb_cpu_gdb_write_stack_protect, 2, > + "microblaze-stack-protect.xml", 0); > > set_float_rounding_mode(float_round_nearest_even, &env->fp_status); > > @@ -422,7 +426,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) > cc->sysemu_ops = &mb_sysemu_ops; > #endif > device_class_set_props(dc, mb_properties); > - cc->gdb_num_core_regs = 32 + 27; > + cc->gdb_num_core_regs = 32 + 25; > + cc->gdb_core_xml_file = "microblaze-core.xml"; > > cc->disas_set_info = mb_disas_set_info; > cc->tcg_ops = &mb_tcg_ops; > diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c > index 2e6e070051..8143fcae88 100644 > --- a/target/microblaze/gdbstub.c > +++ b/target/microblaze/gdbstub.c > @@ -39,8 +39,11 @@ enum { > GDB_PVR0 = 32 + 6, > GDB_PVR11 = 32 + 17, > GDB_EDR = 32 + 18, > - GDB_SLR = 32 + 25, > - GDB_SHR = 32 + 26, > +}; > + > +enum { > + GDB_SP_SHL, > + GDB_SP_SHR, > }; > > int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > @@ -83,12 +86,6 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > case GDB_EDR: > val = env->edr; > break; > - case GDB_SLR: > - val = env->slr; > - break; > - case GDB_SHR: > - val = env->shr; > - break; > default: > /* Other SRegs aren't modeled, so report a value of 0 */ > val = 0; > @@ -97,6 +94,23 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > return gdb_get_reg32(mem_buf, val); > } > > +int mb_cpu_gdb_read_stack_protect(CPUMBState *env, GByteArray *mem_buf, int n) > +{ > + uint32_t val; > + > + switch (n) { > + case GDB_SP_SHL: > + val = env->slr; > + break; > + case GDB_SP_SHR: > + val = env->shr; > + break; > + default: > + return 0; > + } > + return gdb_get_reg32(mem_buf, val); > +} > + > int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) > { > MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); > @@ -135,12 +149,21 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) > case GDB_EDR: > env->edr = tmp; > break; > - case GDB_SLR: > - env->slr = tmp; > - break; > - case GDB_SHR: > - env->shr = tmp; > - break; > + } > + return 4; > +} > + > +int mb_cpu_gdb_write_stack_protect(CPUMBState *env, uint8_t *mem_buf, int n) > +{ > + switch (n) { > + case GDB_SP_SHL: > + env->slr = ldl_p(mem_buf); > + break; > + case GDB_SP_SHR: > + env->shr = ldl_p(mem_buf); > + break; > + default: > + return 0; > } > return 4; > } > diff --git a/gdb-xml/microblaze-core.xml b/gdb-xml/microblaze-core.xml > new file mode 100644 > index 0000000000..becf77c89c > --- /dev/null > +++ b/gdb-xml/microblaze-core.xml > @@ -0,0 +1,67 @@ > +<?xml version="1.0"?> > +<!-- Copyright (C) 2008 Free Software Foundation, Inc. > + > + Copying and distribution of this file, with or without modification, > + are permitted in any medium without royalty provided the copyright > + notice and this notice are preserved. --> > + > +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> > +<feature name="org.gnu.gdb.microblaze.core"> > + <reg name="r0" bitsize="32" regnum="0"/> > + <reg name="r1" bitsize="32" type="data_ptr"/> > + <reg name="r2" bitsize="32"/> > + <reg name="r3" bitsize="32"/> > + <reg name="r4" bitsize="32"/> > + <reg name="r5" bitsize="32"/> > + <reg name="r6" bitsize="32"/> > + <reg name="r7" bitsize="32"/> > + <reg name="r8" bitsize="32"/> > + <reg name="r9" bitsize="32"/> > + <reg name="r10" bitsize="32"/> > + <reg name="r11" bitsize="32"/> > + <reg name="r12" bitsize="32"/> > + <reg name="r13" bitsize="32"/> > + <reg name="r14" bitsize="32"/> > + <reg name="r15" bitsize="32"/> > + <reg name="r16" bitsize="32"/> > + <reg name="r17" bitsize="32"/> > + <reg name="r18" bitsize="32"/> > + <reg name="r19" bitsize="32"/> > + <reg name="r20" bitsize="32"/> > + <reg name="r21" bitsize="32"/> > + <reg name="r22" bitsize="32"/> > + <reg name="r23" bitsize="32"/> > + <reg name="r24" bitsize="32"/> > + <reg name="r25" bitsize="32"/> > + <reg name="r26" bitsize="32"/> > + <reg name="r27" bitsize="32"/> > + <reg name="r28" bitsize="32"/> > + <reg name="r29" bitsize="32"/> > + <reg name="r30" bitsize="32"/> > + <reg name="r31" bitsize="32"/> > + <reg name="rpc" bitsize="32" type="code_ptr"/> > + <reg name="rmsr" bitsize="32"/> > + <reg name="rear" bitsize="32"/> > + <reg name="resr" bitsize="32"/> > + <reg name="rfsr" bitsize="32"/> > + <reg name="rbtr" bitsize="32"/> > + <reg name="rpvr0" bitsize="32"/> > + <reg name="rpvr1" bitsize="32"/> > + <reg name="rpvr2" bitsize="32"/> > + <reg name="rpvr3" bitsize="32"/> > + <reg name="rpvr4" bitsize="32"/> > + <reg name="rpvr5" bitsize="32"/> > + <reg name="rpvr6" bitsize="32"/> > + <reg name="rpvr7" bitsize="32"/> > + <reg name="rpvr8" bitsize="32"/> > + <reg name="rpvr9" bitsize="32"/> > + <reg name="rpvr10" bitsize="32"/> > + <reg name="rpvr11" bitsize="32"/> > + <reg name="redr" bitsize="32"/> > + <reg name="rpid" bitsize="32"/> > + <reg name="rzpr" bitsize="32"/> > + <reg name="rtlbx" bitsize="32"/> > + <reg name="rtlbsx" bitsize="32"/> > + <reg name="rtlblo" bitsize="32"/> > + <reg name="rtlbhi" bitsize="32"/> > +</feature> > diff --git a/gdb-xml/microblaze-stack-protect.xml b/gdb-xml/microblaze-stack-protect.xml > new file mode 100644 > index 0000000000..997301e8a2 > --- /dev/null > +++ b/gdb-xml/microblaze-stack-protect.xml > @@ -0,0 +1,12 @@ > +<?xml version="1.0"?> > +<!-- Copyright (C) 2008 Free Software Foundation, Inc. > + > + Copying and distribution of this file, with or without modification, > + are permitted in any medium without royalty provided the copyright > + notice and this notice are preserved. --> > + > +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> > +<feature name="org.gnu.gdb.microblaze.stack-protect"> > + <reg name="rslr" bitsize="32"/> > + <reg name="rshr" bitsize="32"/> > +</feature> > -- > 2.34.1 >
Alex, Edgar, this has been reviewed. Will either of you take it with your trees, or shall I just queue it through tcg-next? r~ On 12/30/22 06:24, Richard Henderson wrote: > Mirroring the upstream gdb xml files, the two stack boundary > registers are separated out. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > > I did this thinking I would be fixing: > > TEST basic gdbstub support on microblaze > Truncated register 35 in remote 'g' packet > Traceback (most recent call last): > File "/home/rth/qemu/src/tests/tcg/multiarch/gdbstub/sha1.py", > line 71, in <module> if gdb.parse_and_eval('$pc') == 0: > gdb.error: No registers. > > but in the end it turned out that the gdb-multiarch supplied > by ubuntu 22.04 simply doesn't support MicroBlaze, as can be > seen with the "set architecture" command within gdb. > > (I built gdb from source, to try and debug why this still wasn't > working, only to find that it did. :-P) > > Alex, any way to modify our gdb test to fail gracefully here? > > Regardless, having proper xml for all of our targets seems > like the correct way forward. > > > r~ > > Cc: Alex Bennée <alex.bennee@linaro.org> > Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> > --- > configs/targets/microblaze-linux-user.mak | 1 + > configs/targets/microblaze-softmmu.mak | 1 + > configs/targets/microblazeel-linux-user.mak | 1 + > configs/targets/microblazeel-softmmu.mak | 1 + > target/microblaze/cpu.h | 2 + > target/microblaze/cpu.c | 7 ++- > target/microblaze/gdbstub.c | 51 +++++++++++----- > gdb-xml/microblaze-core.xml | 67 +++++++++++++++++++++ > gdb-xml/microblaze-stack-protect.xml | 12 ++++ > 9 files changed, 128 insertions(+), 15 deletions(-) > create mode 100644 gdb-xml/microblaze-core.xml > create mode 100644 gdb-xml/microblaze-stack-protect.xml > > diff --git a/configs/targets/microblaze-linux-user.mak b/configs/targets/microblaze-linux-user.mak > index 4249a37f65..0a2322c249 100644 > --- a/configs/targets/microblaze-linux-user.mak > +++ b/configs/targets/microblaze-linux-user.mak > @@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common > TARGET_SYSTBL=syscall.tbl > TARGET_BIG_ENDIAN=y > TARGET_HAS_BFLT=y > +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml > diff --git a/configs/targets/microblaze-softmmu.mak b/configs/targets/microblaze-softmmu.mak > index 8385e2d333..e84c0cc728 100644 > --- a/configs/targets/microblaze-softmmu.mak > +++ b/configs/targets/microblaze-softmmu.mak > @@ -2,3 +2,4 @@ TARGET_ARCH=microblaze > TARGET_BIG_ENDIAN=y > TARGET_SUPPORTS_MTTCG=y > TARGET_NEED_FDT=y > +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml > diff --git a/configs/targets/microblazeel-linux-user.mak b/configs/targets/microblazeel-linux-user.mak > index d0e775d840..270743156a 100644 > --- a/configs/targets/microblazeel-linux-user.mak > +++ b/configs/targets/microblazeel-linux-user.mak > @@ -2,3 +2,4 @@ TARGET_ARCH=microblaze > TARGET_SYSTBL_ABI=common > TARGET_SYSTBL=syscall.tbl > TARGET_HAS_BFLT=y > +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml > diff --git a/configs/targets/microblazeel-softmmu.mak b/configs/targets/microblazeel-softmmu.mak > index af40391f2f..9b688036bd 100644 > --- a/configs/targets/microblazeel-softmmu.mak > +++ b/configs/targets/microblazeel-softmmu.mak > @@ -1,3 +1,4 @@ > TARGET_ARCH=microblaze > TARGET_SUPPORTS_MTTCG=y > TARGET_NEED_FDT=y > +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml > diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h > index 1e84dd8f47..e541fbb0b3 100644 > --- a/target/microblaze/cpu.h > +++ b/target/microblaze/cpu.h > @@ -367,6 +367,8 @@ hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, > MemTxAttrs *attrs); > int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > +int mb_cpu_gdb_read_stack_protect(CPUArchState *cpu, GByteArray *buf, int reg); > +int mb_cpu_gdb_write_stack_protect(CPUArchState *cpu, uint8_t *buf, int reg); > > static inline uint32_t mb_cpu_read_msr(const CPUMBState *env) > { > diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c > index 817681f9b2..a2d2f5c340 100644 > --- a/target/microblaze/cpu.c > +++ b/target/microblaze/cpu.c > @@ -28,6 +28,7 @@ > #include "qemu/module.h" > #include "hw/qdev-properties.h" > #include "exec/exec-all.h" > +#include "exec/gdbstub.h" > #include "fpu/softfloat-helpers.h" > > static const struct { > @@ -294,6 +295,9 @@ static void mb_cpu_initfn(Object *obj) > CPUMBState *env = &cpu->env; > > cpu_set_cpustate_pointers(cpu); > + gdb_register_coprocessor(CPU(cpu), mb_cpu_gdb_read_stack_protect, > + mb_cpu_gdb_write_stack_protect, 2, > + "microblaze-stack-protect.xml", 0); > > set_float_rounding_mode(float_round_nearest_even, &env->fp_status); > > @@ -422,7 +426,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) > cc->sysemu_ops = &mb_sysemu_ops; > #endif > device_class_set_props(dc, mb_properties); > - cc->gdb_num_core_regs = 32 + 27; > + cc->gdb_num_core_regs = 32 + 25; > + cc->gdb_core_xml_file = "microblaze-core.xml"; > > cc->disas_set_info = mb_disas_set_info; > cc->tcg_ops = &mb_tcg_ops; > diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c > index 2e6e070051..8143fcae88 100644 > --- a/target/microblaze/gdbstub.c > +++ b/target/microblaze/gdbstub.c > @@ -39,8 +39,11 @@ enum { > GDB_PVR0 = 32 + 6, > GDB_PVR11 = 32 + 17, > GDB_EDR = 32 + 18, > - GDB_SLR = 32 + 25, > - GDB_SHR = 32 + 26, > +}; > + > +enum { > + GDB_SP_SHL, > + GDB_SP_SHR, > }; > > int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > @@ -83,12 +86,6 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > case GDB_EDR: > val = env->edr; > break; > - case GDB_SLR: > - val = env->slr; > - break; > - case GDB_SHR: > - val = env->shr; > - break; > default: > /* Other SRegs aren't modeled, so report a value of 0 */ > val = 0; > @@ -97,6 +94,23 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > return gdb_get_reg32(mem_buf, val); > } > > +int mb_cpu_gdb_read_stack_protect(CPUMBState *env, GByteArray *mem_buf, int n) > +{ > + uint32_t val; > + > + switch (n) { > + case GDB_SP_SHL: > + val = env->slr; > + break; > + case GDB_SP_SHR: > + val = env->shr; > + break; > + default: > + return 0; > + } > + return gdb_get_reg32(mem_buf, val); > +} > + > int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) > { > MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); > @@ -135,12 +149,21 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) > case GDB_EDR: > env->edr = tmp; > break; > - case GDB_SLR: > - env->slr = tmp; > - break; > - case GDB_SHR: > - env->shr = tmp; > - break; > + } > + return 4; > +} > + > +int mb_cpu_gdb_write_stack_protect(CPUMBState *env, uint8_t *mem_buf, int n) > +{ > + switch (n) { > + case GDB_SP_SHL: > + env->slr = ldl_p(mem_buf); > + break; > + case GDB_SP_SHR: > + env->shr = ldl_p(mem_buf); > + break; > + default: > + return 0; > } > return 4; > } > diff --git a/gdb-xml/microblaze-core.xml b/gdb-xml/microblaze-core.xml > new file mode 100644 > index 0000000000..becf77c89c > --- /dev/null > +++ b/gdb-xml/microblaze-core.xml > @@ -0,0 +1,67 @@ > +<?xml version="1.0"?> > +<!-- Copyright (C) 2008 Free Software Foundation, Inc. > + > + Copying and distribution of this file, with or without modification, > + are permitted in any medium without royalty provided the copyright > + notice and this notice are preserved. --> > + > +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> > +<feature name="org.gnu.gdb.microblaze.core"> > + <reg name="r0" bitsize="32" regnum="0"/> > + <reg name="r1" bitsize="32" type="data_ptr"/> > + <reg name="r2" bitsize="32"/> > + <reg name="r3" bitsize="32"/> > + <reg name="r4" bitsize="32"/> > + <reg name="r5" bitsize="32"/> > + <reg name="r6" bitsize="32"/> > + <reg name="r7" bitsize="32"/> > + <reg name="r8" bitsize="32"/> > + <reg name="r9" bitsize="32"/> > + <reg name="r10" bitsize="32"/> > + <reg name="r11" bitsize="32"/> > + <reg name="r12" bitsize="32"/> > + <reg name="r13" bitsize="32"/> > + <reg name="r14" bitsize="32"/> > + <reg name="r15" bitsize="32"/> > + <reg name="r16" bitsize="32"/> > + <reg name="r17" bitsize="32"/> > + <reg name="r18" bitsize="32"/> > + <reg name="r19" bitsize="32"/> > + <reg name="r20" bitsize="32"/> > + <reg name="r21" bitsize="32"/> > + <reg name="r22" bitsize="32"/> > + <reg name="r23" bitsize="32"/> > + <reg name="r24" bitsize="32"/> > + <reg name="r25" bitsize="32"/> > + <reg name="r26" bitsize="32"/> > + <reg name="r27" bitsize="32"/> > + <reg name="r28" bitsize="32"/> > + <reg name="r29" bitsize="32"/> > + <reg name="r30" bitsize="32"/> > + <reg name="r31" bitsize="32"/> > + <reg name="rpc" bitsize="32" type="code_ptr"/> > + <reg name="rmsr" bitsize="32"/> > + <reg name="rear" bitsize="32"/> > + <reg name="resr" bitsize="32"/> > + <reg name="rfsr" bitsize="32"/> > + <reg name="rbtr" bitsize="32"/> > + <reg name="rpvr0" bitsize="32"/> > + <reg name="rpvr1" bitsize="32"/> > + <reg name="rpvr2" bitsize="32"/> > + <reg name="rpvr3" bitsize="32"/> > + <reg name="rpvr4" bitsize="32"/> > + <reg name="rpvr5" bitsize="32"/> > + <reg name="rpvr6" bitsize="32"/> > + <reg name="rpvr7" bitsize="32"/> > + <reg name="rpvr8" bitsize="32"/> > + <reg name="rpvr9" bitsize="32"/> > + <reg name="rpvr10" bitsize="32"/> > + <reg name="rpvr11" bitsize="32"/> > + <reg name="redr" bitsize="32"/> > + <reg name="rpid" bitsize="32"/> > + <reg name="rzpr" bitsize="32"/> > + <reg name="rtlbx" bitsize="32"/> > + <reg name="rtlbsx" bitsize="32"/> > + <reg name="rtlblo" bitsize="32"/> > + <reg name="rtlbhi" bitsize="32"/> > +</feature> > diff --git a/gdb-xml/microblaze-stack-protect.xml b/gdb-xml/microblaze-stack-protect.xml > new file mode 100644 > index 0000000000..997301e8a2 > --- /dev/null > +++ b/gdb-xml/microblaze-stack-protect.xml > @@ -0,0 +1,12 @@ > +<?xml version="1.0"?> > +<!-- Copyright (C) 2008 Free Software Foundation, Inc. > + > + Copying and distribution of this file, with or without modification, > + are permitted in any medium without royalty provided the copyright > + notice and this notice are preserved. --> > + > +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> > +<feature name="org.gnu.gdb.microblaze.stack-protect"> > + <reg name="rslr" bitsize="32"/> > + <reg name="rshr" bitsize="32"/> > +</feature>
On Thu, Feb 16, 2023 at 12:56 AM Richard Henderson < richard.henderson@linaro.org> wrote: > Alex, Edgar, this has been reviewed. Will either of you take it with your > trees, or shall > I just queue it through tcg-next? > > Hi Richard, yeah if you don't mind, please take it through your tree! Thanks, Edgar > r~ > > On 12/30/22 06:24, Richard Henderson wrote: > > Mirroring the upstream gdb xml files, the two stack boundary > > registers are separated out. > > > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > > --- > > > > I did this thinking I would be fixing: > > > > TEST basic gdbstub support on microblaze > > Truncated register 35 in remote 'g' packet > > Traceback (most recent call last): > > File "/home/rth/qemu/src/tests/tcg/multiarch/gdbstub/sha1.py", > > line 71, in <module> if gdb.parse_and_eval('$pc') == 0: > > gdb.error: No registers. > > > > but in the end it turned out that the gdb-multiarch supplied > > by ubuntu 22.04 simply doesn't support MicroBlaze, as can be > > seen with the "set architecture" command within gdb. > > > > (I built gdb from source, to try and debug why this still wasn't > > working, only to find that it did. :-P) > > > > Alex, any way to modify our gdb test to fail gracefully here? > > > > Regardless, having proper xml for all of our targets seems > > like the correct way forward. > > > > > > r~ > > > > Cc: Alex Bennée <alex.bennee@linaro.org> > > Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> > > --- > > configs/targets/microblaze-linux-user.mak | 1 + > > configs/targets/microblaze-softmmu.mak | 1 + > > configs/targets/microblazeel-linux-user.mak | 1 + > > configs/targets/microblazeel-softmmu.mak | 1 + > > target/microblaze/cpu.h | 2 + > > target/microblaze/cpu.c | 7 ++- > > target/microblaze/gdbstub.c | 51 +++++++++++----- > > gdb-xml/microblaze-core.xml | 67 +++++++++++++++++++++ > > gdb-xml/microblaze-stack-protect.xml | 12 ++++ > > 9 files changed, 128 insertions(+), 15 deletions(-) > > create mode 100644 gdb-xml/microblaze-core.xml > > create mode 100644 gdb-xml/microblaze-stack-protect.xml > > > > diff --git a/configs/targets/microblaze-linux-user.mak > b/configs/targets/microblaze-linux-user.mak > > index 4249a37f65..0a2322c249 100644 > > --- a/configs/targets/microblaze-linux-user.mak > > +++ b/configs/targets/microblaze-linux-user.mak > > @@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common > > TARGET_SYSTBL=syscall.tbl > > TARGET_BIG_ENDIAN=y > > TARGET_HAS_BFLT=y > > +TARGET_XML_FILES=gdb-xml/microblaze-core.xml > gdb-xml/microblaze-stack-protect.xml > > diff --git a/configs/targets/microblaze-softmmu.mak > b/configs/targets/microblaze-softmmu.mak > > index 8385e2d333..e84c0cc728 100644 > > --- a/configs/targets/microblaze-softmmu.mak > > +++ b/configs/targets/microblaze-softmmu.mak > > @@ -2,3 +2,4 @@ TARGET_ARCH=microblaze > > TARGET_BIG_ENDIAN=y > > TARGET_SUPPORTS_MTTCG=y > > TARGET_NEED_FDT=y > > +TARGET_XML_FILES=gdb-xml/microblaze-core.xml > gdb-xml/microblaze-stack-protect.xml > > diff --git a/configs/targets/microblazeel-linux-user.mak > b/configs/targets/microblazeel-linux-user.mak > > index d0e775d840..270743156a 100644 > > --- a/configs/targets/microblazeel-linux-user.mak > > +++ b/configs/targets/microblazeel-linux-user.mak > > @@ -2,3 +2,4 @@ TARGET_ARCH=microblaze > > TARGET_SYSTBL_ABI=common > > TARGET_SYSTBL=syscall.tbl > > TARGET_HAS_BFLT=y > > +TARGET_XML_FILES=gdb-xml/microblaze-core.xml > gdb-xml/microblaze-stack-protect.xml > > diff --git a/configs/targets/microblazeel-softmmu.mak > b/configs/targets/microblazeel-softmmu.mak > > index af40391f2f..9b688036bd 100644 > > --- a/configs/targets/microblazeel-softmmu.mak > > +++ b/configs/targets/microblazeel-softmmu.mak > > @@ -1,3 +1,4 @@ > > TARGET_ARCH=microblaze > > TARGET_SUPPORTS_MTTCG=y > > TARGET_NEED_FDT=y > > +TARGET_XML_FILES=gdb-xml/microblaze-core.xml > gdb-xml/microblaze-stack-protect.xml > > diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h > > index 1e84dd8f47..e541fbb0b3 100644 > > --- a/target/microblaze/cpu.h > > +++ b/target/microblaze/cpu.h > > @@ -367,6 +367,8 @@ hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState > *cpu, vaddr addr, > > MemTxAttrs *attrs); > > int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); > > int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); > > +int mb_cpu_gdb_read_stack_protect(CPUArchState *cpu, GByteArray *buf, > int reg); > > +int mb_cpu_gdb_write_stack_protect(CPUArchState *cpu, uint8_t *buf, int > reg); > > > > static inline uint32_t mb_cpu_read_msr(const CPUMBState *env) > > { > > diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c > > index 817681f9b2..a2d2f5c340 100644 > > --- a/target/microblaze/cpu.c > > +++ b/target/microblaze/cpu.c > > @@ -28,6 +28,7 @@ > > #include "qemu/module.h" > > #include "hw/qdev-properties.h" > > #include "exec/exec-all.h" > > +#include "exec/gdbstub.h" > > #include "fpu/softfloat-helpers.h" > > > > static const struct { > > @@ -294,6 +295,9 @@ static void mb_cpu_initfn(Object *obj) > > CPUMBState *env = &cpu->env; > > > > cpu_set_cpustate_pointers(cpu); > > + gdb_register_coprocessor(CPU(cpu), mb_cpu_gdb_read_stack_protect, > > + mb_cpu_gdb_write_stack_protect, 2, > > + "microblaze-stack-protect.xml", 0); > > > > set_float_rounding_mode(float_round_nearest_even, &env->fp_status); > > > > @@ -422,7 +426,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void > *data) > > cc->sysemu_ops = &mb_sysemu_ops; > > #endif > > device_class_set_props(dc, mb_properties); > > - cc->gdb_num_core_regs = 32 + 27; > > + cc->gdb_num_core_regs = 32 + 25; > > + cc->gdb_core_xml_file = "microblaze-core.xml"; > > > > cc->disas_set_info = mb_disas_set_info; > > cc->tcg_ops = &mb_tcg_ops; > > diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c > > index 2e6e070051..8143fcae88 100644 > > --- a/target/microblaze/gdbstub.c > > +++ b/target/microblaze/gdbstub.c > > @@ -39,8 +39,11 @@ enum { > > GDB_PVR0 = 32 + 6, > > GDB_PVR11 = 32 + 17, > > GDB_EDR = 32 + 18, > > - GDB_SLR = 32 + 25, > > - GDB_SHR = 32 + 26, > > +}; > > + > > +enum { > > + GDB_SP_SHL, > > + GDB_SP_SHR, > > }; > > > > int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) > > @@ -83,12 +86,6 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray > *mem_buf, int n) > > case GDB_EDR: > > val = env->edr; > > break; > > - case GDB_SLR: > > - val = env->slr; > > - break; > > - case GDB_SHR: > > - val = env->shr; > > - break; > > default: > > /* Other SRegs aren't modeled, so report a value of 0 */ > > val = 0; > > @@ -97,6 +94,23 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray > *mem_buf, int n) > > return gdb_get_reg32(mem_buf, val); > > } > > > > +int mb_cpu_gdb_read_stack_protect(CPUMBState *env, GByteArray *mem_buf, > int n) > > +{ > > + uint32_t val; > > + > > + switch (n) { > > + case GDB_SP_SHL: > > + val = env->slr; > > + break; > > + case GDB_SP_SHR: > > + val = env->shr; > > + break; > > + default: > > + return 0; > > + } > > + return gdb_get_reg32(mem_buf, val); > > +} > > + > > int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) > > { > > MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); > > @@ -135,12 +149,21 @@ int mb_cpu_gdb_write_register(CPUState *cs, > uint8_t *mem_buf, int n) > > case GDB_EDR: > > env->edr = tmp; > > break; > > - case GDB_SLR: > > - env->slr = tmp; > > - break; > > - case GDB_SHR: > > - env->shr = tmp; > > - break; > > + } > > + return 4; > > +} > > + > > +int mb_cpu_gdb_write_stack_protect(CPUMBState *env, uint8_t *mem_buf, > int n) > > +{ > > + switch (n) { > > + case GDB_SP_SHL: > > + env->slr = ldl_p(mem_buf); > > + break; > > + case GDB_SP_SHR: > > + env->shr = ldl_p(mem_buf); > > + break; > > + default: > > + return 0; > > } > > return 4; > > } > > diff --git a/gdb-xml/microblaze-core.xml b/gdb-xml/microblaze-core.xml > > new file mode 100644 > > index 0000000000..becf77c89c > > --- /dev/null > > +++ b/gdb-xml/microblaze-core.xml > > @@ -0,0 +1,67 @@ > > +<?xml version="1.0"?> > > +<!-- Copyright (C) 2008 Free Software Foundation, Inc. > > + > > + Copying and distribution of this file, with or without > modification, > > + are permitted in any medium without royalty provided the copyright > > + notice and this notice are preserved. --> > > + > > +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> > > +<feature name="org.gnu.gdb.microblaze.core"> > > + <reg name="r0" bitsize="32" regnum="0"/> > > + <reg name="r1" bitsize="32" type="data_ptr"/> > > + <reg name="r2" bitsize="32"/> > > + <reg name="r3" bitsize="32"/> > > + <reg name="r4" bitsize="32"/> > > + <reg name="r5" bitsize="32"/> > > + <reg name="r6" bitsize="32"/> > > + <reg name="r7" bitsize="32"/> > > + <reg name="r8" bitsize="32"/> > > + <reg name="r9" bitsize="32"/> > > + <reg name="r10" bitsize="32"/> > > + <reg name="r11" bitsize="32"/> > > + <reg name="r12" bitsize="32"/> > > + <reg name="r13" bitsize="32"/> > > + <reg name="r14" bitsize="32"/> > > + <reg name="r15" bitsize="32"/> > > + <reg name="r16" bitsize="32"/> > > + <reg name="r17" bitsize="32"/> > > + <reg name="r18" bitsize="32"/> > > + <reg name="r19" bitsize="32"/> > > + <reg name="r20" bitsize="32"/> > > + <reg name="r21" bitsize="32"/> > > + <reg name="r22" bitsize="32"/> > > + <reg name="r23" bitsize="32"/> > > + <reg name="r24" bitsize="32"/> > > + <reg name="r25" bitsize="32"/> > > + <reg name="r26" bitsize="32"/> > > + <reg name="r27" bitsize="32"/> > > + <reg name="r28" bitsize="32"/> > > + <reg name="r29" bitsize="32"/> > > + <reg name="r30" bitsize="32"/> > > + <reg name="r31" bitsize="32"/> > > + <reg name="rpc" bitsize="32" type="code_ptr"/> > > + <reg name="rmsr" bitsize="32"/> > > + <reg name="rear" bitsize="32"/> > > + <reg name="resr" bitsize="32"/> > > + <reg name="rfsr" bitsize="32"/> > > + <reg name="rbtr" bitsize="32"/> > > + <reg name="rpvr0" bitsize="32"/> > > + <reg name="rpvr1" bitsize="32"/> > > + <reg name="rpvr2" bitsize="32"/> > > + <reg name="rpvr3" bitsize="32"/> > > + <reg name="rpvr4" bitsize="32"/> > > + <reg name="rpvr5" bitsize="32"/> > > + <reg name="rpvr6" bitsize="32"/> > > + <reg name="rpvr7" bitsize="32"/> > > + <reg name="rpvr8" bitsize="32"/> > > + <reg name="rpvr9" bitsize="32"/> > > + <reg name="rpvr10" bitsize="32"/> > > + <reg name="rpvr11" bitsize="32"/> > > + <reg name="redr" bitsize="32"/> > > + <reg name="rpid" bitsize="32"/> > > + <reg name="rzpr" bitsize="32"/> > > + <reg name="rtlbx" bitsize="32"/> > > + <reg name="rtlbsx" bitsize="32"/> > > + <reg name="rtlblo" bitsize="32"/> > > + <reg name="rtlbhi" bitsize="32"/> > > +</feature> > > diff --git a/gdb-xml/microblaze-stack-protect.xml > b/gdb-xml/microblaze-stack-protect.xml > > new file mode 100644 > > index 0000000000..997301e8a2 > > --- /dev/null > > +++ b/gdb-xml/microblaze-stack-protect.xml > > @@ -0,0 +1,12 @@ > > +<?xml version="1.0"?> > > +<!-- Copyright (C) 2008 Free Software Foundation, Inc. > > + > > + Copying and distribution of this file, with or without > modification, > > + are permitted in any medium without royalty provided the copyright > > + notice and this notice are preserved. --> > > + > > +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> > > +<feature name="org.gnu.gdb.microblaze.stack-protect"> > > + <reg name="rslr" bitsize="32"/> > > + <reg name="rshr" bitsize="32"/> > > +</feature> > >
diff --git a/configs/targets/microblaze-linux-user.mak b/configs/targets/microblaze-linux-user.mak index 4249a37f65..0a2322c249 100644 --- a/configs/targets/microblaze-linux-user.mak +++ b/configs/targets/microblaze-linux-user.mak @@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common TARGET_SYSTBL=syscall.tbl TARGET_BIG_ENDIAN=y TARGET_HAS_BFLT=y +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml diff --git a/configs/targets/microblaze-softmmu.mak b/configs/targets/microblaze-softmmu.mak index 8385e2d333..e84c0cc728 100644 --- a/configs/targets/microblaze-softmmu.mak +++ b/configs/targets/microblaze-softmmu.mak @@ -2,3 +2,4 @@ TARGET_ARCH=microblaze TARGET_BIG_ENDIAN=y TARGET_SUPPORTS_MTTCG=y TARGET_NEED_FDT=y +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml diff --git a/configs/targets/microblazeel-linux-user.mak b/configs/targets/microblazeel-linux-user.mak index d0e775d840..270743156a 100644 --- a/configs/targets/microblazeel-linux-user.mak +++ b/configs/targets/microblazeel-linux-user.mak @@ -2,3 +2,4 @@ TARGET_ARCH=microblaze TARGET_SYSTBL_ABI=common TARGET_SYSTBL=syscall.tbl TARGET_HAS_BFLT=y +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml diff --git a/configs/targets/microblazeel-softmmu.mak b/configs/targets/microblazeel-softmmu.mak index af40391f2f..9b688036bd 100644 --- a/configs/targets/microblazeel-softmmu.mak +++ b/configs/targets/microblazeel-softmmu.mak @@ -1,3 +1,4 @@ TARGET_ARCH=microblaze TARGET_SUPPORTS_MTTCG=y TARGET_NEED_FDT=y +TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 1e84dd8f47..e541fbb0b3 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -367,6 +367,8 @@ hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, MemTxAttrs *attrs); int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); +int mb_cpu_gdb_read_stack_protect(CPUArchState *cpu, GByteArray *buf, int reg); +int mb_cpu_gdb_write_stack_protect(CPUArchState *cpu, uint8_t *buf, int reg); static inline uint32_t mb_cpu_read_msr(const CPUMBState *env) { diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 817681f9b2..a2d2f5c340 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -28,6 +28,7 @@ #include "qemu/module.h" #include "hw/qdev-properties.h" #include "exec/exec-all.h" +#include "exec/gdbstub.h" #include "fpu/softfloat-helpers.h" static const struct { @@ -294,6 +295,9 @@ static void mb_cpu_initfn(Object *obj) CPUMBState *env = &cpu->env; cpu_set_cpustate_pointers(cpu); + gdb_register_coprocessor(CPU(cpu), mb_cpu_gdb_read_stack_protect, + mb_cpu_gdb_write_stack_protect, 2, + "microblaze-stack-protect.xml", 0); set_float_rounding_mode(float_round_nearest_even, &env->fp_status); @@ -422,7 +426,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) cc->sysemu_ops = &mb_sysemu_ops; #endif device_class_set_props(dc, mb_properties); - cc->gdb_num_core_regs = 32 + 27; + cc->gdb_num_core_regs = 32 + 25; + cc->gdb_core_xml_file = "microblaze-core.xml"; cc->disas_set_info = mb_disas_set_info; cc->tcg_ops = &mb_tcg_ops; diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c index 2e6e070051..8143fcae88 100644 --- a/target/microblaze/gdbstub.c +++ b/target/microblaze/gdbstub.c @@ -39,8 +39,11 @@ enum { GDB_PVR0 = 32 + 6, GDB_PVR11 = 32 + 17, GDB_EDR = 32 + 18, - GDB_SLR = 32 + 25, - GDB_SHR = 32 + 26, +}; + +enum { + GDB_SP_SHL, + GDB_SP_SHR, }; int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) @@ -83,12 +86,6 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) case GDB_EDR: val = env->edr; break; - case GDB_SLR: - val = env->slr; - break; - case GDB_SHR: - val = env->shr; - break; default: /* Other SRegs aren't modeled, so report a value of 0 */ val = 0; @@ -97,6 +94,23 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) return gdb_get_reg32(mem_buf, val); } +int mb_cpu_gdb_read_stack_protect(CPUMBState *env, GByteArray *mem_buf, int n) +{ + uint32_t val; + + switch (n) { + case GDB_SP_SHL: + val = env->slr; + break; + case GDB_SP_SHR: + val = env->shr; + break; + default: + return 0; + } + return gdb_get_reg32(mem_buf, val); +} + int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); @@ -135,12 +149,21 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) case GDB_EDR: env->edr = tmp; break; - case GDB_SLR: - env->slr = tmp; - break; - case GDB_SHR: - env->shr = tmp; - break; + } + return 4; +} + +int mb_cpu_gdb_write_stack_protect(CPUMBState *env, uint8_t *mem_buf, int n) +{ + switch (n) { + case GDB_SP_SHL: + env->slr = ldl_p(mem_buf); + break; + case GDB_SP_SHR: + env->shr = ldl_p(mem_buf); + break; + default: + return 0; } return 4; } diff --git a/gdb-xml/microblaze-core.xml b/gdb-xml/microblaze-core.xml new file mode 100644 index 0000000000..becf77c89c --- /dev/null +++ b/gdb-xml/microblaze-core.xml @@ -0,0 +1,67 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.microblaze.core"> + <reg name="r0" bitsize="32" regnum="0"/> + <reg name="r1" bitsize="32" type="data_ptr"/> + <reg name="r2" bitsize="32"/> + <reg name="r3" bitsize="32"/> + <reg name="r4" bitsize="32"/> + <reg name="r5" bitsize="32"/> + <reg name="r6" bitsize="32"/> + <reg name="r7" bitsize="32"/> + <reg name="r8" bitsize="32"/> + <reg name="r9" bitsize="32"/> + <reg name="r10" bitsize="32"/> + <reg name="r11" bitsize="32"/> + <reg name="r12" bitsize="32"/> + <reg name="r13" bitsize="32"/> + <reg name="r14" bitsize="32"/> + <reg name="r15" bitsize="32"/> + <reg name="r16" bitsize="32"/> + <reg name="r17" bitsize="32"/> + <reg name="r18" bitsize="32"/> + <reg name="r19" bitsize="32"/> + <reg name="r20" bitsize="32"/> + <reg name="r21" bitsize="32"/> + <reg name="r22" bitsize="32"/> + <reg name="r23" bitsize="32"/> + <reg name="r24" bitsize="32"/> + <reg name="r25" bitsize="32"/> + <reg name="r26" bitsize="32"/> + <reg name="r27" bitsize="32"/> + <reg name="r28" bitsize="32"/> + <reg name="r29" bitsize="32"/> + <reg name="r30" bitsize="32"/> + <reg name="r31" bitsize="32"/> + <reg name="rpc" bitsize="32" type="code_ptr"/> + <reg name="rmsr" bitsize="32"/> + <reg name="rear" bitsize="32"/> + <reg name="resr" bitsize="32"/> + <reg name="rfsr" bitsize="32"/> + <reg name="rbtr" bitsize="32"/> + <reg name="rpvr0" bitsize="32"/> + <reg name="rpvr1" bitsize="32"/> + <reg name="rpvr2" bitsize="32"/> + <reg name="rpvr3" bitsize="32"/> + <reg name="rpvr4" bitsize="32"/> + <reg name="rpvr5" bitsize="32"/> + <reg name="rpvr6" bitsize="32"/> + <reg name="rpvr7" bitsize="32"/> + <reg name="rpvr8" bitsize="32"/> + <reg name="rpvr9" bitsize="32"/> + <reg name="rpvr10" bitsize="32"/> + <reg name="rpvr11" bitsize="32"/> + <reg name="redr" bitsize="32"/> + <reg name="rpid" bitsize="32"/> + <reg name="rzpr" bitsize="32"/> + <reg name="rtlbx" bitsize="32"/> + <reg name="rtlbsx" bitsize="32"/> + <reg name="rtlblo" bitsize="32"/> + <reg name="rtlbhi" bitsize="32"/> +</feature> diff --git a/gdb-xml/microblaze-stack-protect.xml b/gdb-xml/microblaze-stack-protect.xml new file mode 100644 index 0000000000..997301e8a2 --- /dev/null +++ b/gdb-xml/microblaze-stack-protect.xml @@ -0,0 +1,12 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2008 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.microblaze.stack-protect"> + <reg name="rslr" bitsize="32"/> + <reg name="rshr" bitsize="32"/> +</feature>
Mirroring the upstream gdb xml files, the two stack boundary registers are separated out. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- I did this thinking I would be fixing: TEST basic gdbstub support on microblaze Truncated register 35 in remote 'g' packet Traceback (most recent call last): File "/home/rth/qemu/src/tests/tcg/multiarch/gdbstub/sha1.py", line 71, in <module> if gdb.parse_and_eval('$pc') == 0: gdb.error: No registers. but in the end it turned out that the gdb-multiarch supplied by ubuntu 22.04 simply doesn't support MicroBlaze, as can be seen with the "set architecture" command within gdb. (I built gdb from source, to try and debug why this still wasn't working, only to find that it did. :-P) Alex, any way to modify our gdb test to fail gracefully here? Regardless, having proper xml for all of our targets seems like the correct way forward. r~ Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> --- configs/targets/microblaze-linux-user.mak | 1 + configs/targets/microblaze-softmmu.mak | 1 + configs/targets/microblazeel-linux-user.mak | 1 + configs/targets/microblazeel-softmmu.mak | 1 + target/microblaze/cpu.h | 2 + target/microblaze/cpu.c | 7 ++- target/microblaze/gdbstub.c | 51 +++++++++++----- gdb-xml/microblaze-core.xml | 67 +++++++++++++++++++++ gdb-xml/microblaze-stack-protect.xml | 12 ++++ 9 files changed, 128 insertions(+), 15 deletions(-) create mode 100644 gdb-xml/microblaze-core.xml create mode 100644 gdb-xml/microblaze-stack-protect.xml