Message ID | 20230105143228.244965-8-shentey@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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[2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id bt15-20020a056000080f00b00297dcfdc90fsm12260447wrb.24.2023.01.05.06.33.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 06:33:13 -0800 (PST) From: Bernhard Beschow <shentey@gmail.com> To: qemu-devel@nongnu.org Cc: Eduardo Habkost <eduardo@habkost.net>, qemu-block@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= <hpoussin@reactos.org>, Ani Sinha <ani@anisinha.ca>, Richard Henderson <richard.henderson@linaro.org>, Jiaxun Yang <jiaxun.yang@flygoat.com>, Aurelien Jarno <aurelien@aurel32.net>, "Michael S. Tsirkin" <mst@redhat.com>, =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= <philmd@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Igor Mammedov <imammedo@redhat.com>, Marcel Apfelbaum <marcel.apfelbaum@gmail.com>, John Snow <jsnow@redhat.com>, Gerd Hoffmann <kraxel@redhat.com>, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <f4bug@amsat.org>, Bernhard Beschow <shentey@gmail.com>, Peter Maydell <peter.maydell@linaro.org> Subject: [PATCH v5 07/31] hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south bridge Date: Thu, 5 Jan 2023 15:32:04 +0100 Message-Id: <20230105143228.244965-8-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105143228.244965-1-shentey@gmail.com> References: <20230105143228.244965-1-shentey@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=shentey@gmail.com; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org |
Series |
Consolidate PIIX south bridges
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expand
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diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index d1f7d95936..f67893cd7c 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -234,7 +234,8 @@ static void pc_init1(MachineState *machine, : pci_slot_get_pirq); pcms->bus = pci_bus; - pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, type); + pci_dev = pci_new_multifunction(-1, true, type); + pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); piix3 = PIIX3_PCI_DEVICE(pci_dev); piix3->pic = x86ms->gsi; piix3_devfn = piix3->dev.devfn;