From patchwork Mon Jan 9 17:23:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernhard Beschow X-Patchwork-Id: 13093946 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 95EB6C54EBD for ; Mon, 9 Jan 2023 17:39:18 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pEvuH-0003Fr-4T; Mon, 09 Jan 2023 12:25:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pEvtf-0002jI-C3; Mon, 09 Jan 2023 12:25:19 -0500 Received: from mail-ej1-x62b.google.com ([2a00:1450:4864:20::62b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pEvtd-0001Jo-Gc; Mon, 09 Jan 2023 12:25:19 -0500 Received: by mail-ej1-x62b.google.com with SMTP id fc4so21870599ejc.12; Mon, 09 Jan 2023 09:25:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZTrYIrNaAOJ10ynaGMpgu6wEYURWdVAhdTXgUormHxM=; b=F2w+EGwXYQ45OIwOUGI2u5LAvfmAEHP9OH8wl0l6qDh+vxZq3aMNTGRhYoxL5XXVvZ Z4w0x9ODsMqpugnpsBfGlIk7xzqjm/wyCDxugyRGrgFXva8onRkCpkdyxkDHHFVOqxoo g8tzUd6vgVFjONYxgM1QSRdDuS2XVCva4owkTzlwP7Zpm7a2zo3ntndaolAa/ldbBU4p 5xm49fF8gLVsYfJKylSuh5r3DjI8zcv/shiOejeYRNvwb/ztOKrpkFEdtoTfMCaRnszZ 3izyIgI+SJR+JKWxGtcZoXTLfzwob5Z6hgYTsYtEC+QuRJ1In7S5wgIcsRQ29oY2tSj9 KZSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZTrYIrNaAOJ10ynaGMpgu6wEYURWdVAhdTXgUormHxM=; b=pUd4h0aEkiYkKZB67Uk7VUMWNHOj/XM8zqxjxPtnxbSlL+Q17atc1vJTv5QOB8HvjW zCva0s4BNo4ITTq1Xf5c/elmpTxGfRfdVYf2BtAn94qjkvGlmun6I5quGN2Luk4OkIoZ /8cdIMd4fv+muGZZtCH5kKhntty5qypMkeQ+u8WphaIigUs9mVmJ6n9MHb4mdRfMlkft +8tWJlDxwlW5xNzV9SzdAMrwE2gR7pRyZS/hvzEi5kE7VN32NxUxXVm5nEuWWWeWlnKj qin8hjx8B32MipMUb3utAFFWEI7zuTrKDGhV3IftpWSx2YU0cWM2q0z/ocJKsUJRgO9y fcgQ== X-Gm-Message-State: AFqh2kpGy6Duu9ZcQ9d6M+GlJ1A3f1zjp7c6+iK3/ElI9pkRT9LvMOT/ VfvR+5PZDq3IJS0NXZ4/BXj7AIy8ps6uHQ== X-Google-Smtp-Source: AMrXdXvSESXKF5O+V4bXuQu4DhwoWpgScM1oJ/34gq42KcTDS/HFgKLxucqgICVONdMDyUQU1a68pQ== X-Received: by 2002:a17:907:9b06:b0:83f:8e58:6427 with SMTP id kn6-20020a1709079b0600b0083f8e586427mr55035587ejc.63.1673285114390; Mon, 09 Jan 2023 09:25:14 -0800 (PST) Received: from osoxes.fritz.box (p200300faaf0bb2009c4947838afc41b6.dip0.t-ipconnect.de. [2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id 18-20020a170906201200b00846734faa9asm3925625ejo.164.2023.01.09.09.25.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Jan 2023 09:25:14 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: John G Johnson , Richard Henderson , Igor Mammedov , Elena Ufimtseva , Ani Sinha , Eduardo Habkost , Gerd Hoffmann , Jagannathan Raman , "Michael S. Tsirkin" , Paolo Bonzini , John Snow , Aurelien Jarno , qemu-ppc@nongnu.org, Jiaxun Yang , qemu-block@nongnu.org, Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?Phil?= =?utf-8?q?ippe_Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , qemu-arm@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Bernhard Beschow Subject: [PATCH v6 19/33] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS Date: Mon, 9 Jan 2023 18:23:32 +0100 Message-Id: <20230109172347.1830-20-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230109172347.1830-1-shentey@gmail.com> References: <20230109172347.1830-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=shentey@gmail.com; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org PIIX_NUM_PIC_IRQS is assumed to be the same as ISA_NUM_IRQS, otherwise inconsistencies can occur. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Message-Id: <20221022150508.26830-21-shentey@gmail.com> --- include/hw/southbridge/piix.h | 5 ++--- hw/isa/piix3.c | 8 ++++---- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index e3c35ca16f..f48cfd7936 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -32,7 +32,6 @@ */ #define PIIX_RCR_IOPORT 0xcf9 -#define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ #define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */ struct PIIXState { @@ -44,10 +43,10 @@ struct PIIXState { * So one PIC level is tracked by PIIX_NUM_PIRQS bits. * * PIRQ is mapped to PIC pins, we track it by - * PIIX_NUM_PIRQS * PIIX_NUM_PIC_IRQS = 64 bits with + * PIIX_NUM_PIRQS * ISA_NUM_IRQS = 64 bits with * pic_irq * PIIX_NUM_PIRQS + pirq */ -#if PIIX_NUM_PIC_IRQS * PIIX_NUM_PIRQS > 64 +#if ISA_NUM_IRQS * PIIX_NUM_PIRQS > 64 #error "unable to encode pic state in 64bit in pic_levels." #endif uint64_t pic_levels; diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 6d2ffd449c..e813e20639 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -52,7 +52,7 @@ static void piix3_set_irq_level_internal(PIIX3State *piix3, int pirq, int level) uint64_t mask; pic_irq = piix3->dev.config[PIIX_PIRQCA + pirq]; - if (pic_irq >= PIIX_NUM_PIC_IRQS) { + if (pic_irq >= ISA_NUM_IRQS) { return; } @@ -66,7 +66,7 @@ static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level) int pic_irq; pic_irq = piix3->dev.config[PIIX_PIRQCA + pirq]; - if (pic_irq >= PIIX_NUM_PIC_IRQS) { + if (pic_irq >= ISA_NUM_IRQS) { return; } @@ -87,7 +87,7 @@ static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) int irq = piix3->dev.config[PIIX_PIRQCA + pin]; PCIINTxRoute route; - if (irq < PIIX_NUM_PIC_IRQS) { + if (irq < ISA_NUM_IRQS) { route.mode = PCI_INTX_ENABLED; route.irq = irq; } else { @@ -119,7 +119,7 @@ static void piix3_write_config(PCIDevice *dev, pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix3->dev)); piix3_update_irq_levels(piix3); - for (pic_irq = 0; pic_irq < PIIX_NUM_PIC_IRQS; pic_irq++) { + for (pic_irq = 0; pic_irq < ISA_NUM_IRQS; pic_irq++) { piix3_set_irq_pic(piix3, pic_irq); } }