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[2003:fa:af0b:b200:9c49:4783:8afc:41b6]) by smtp.gmail.com with ESMTPSA id 18-20020a170906201200b00846734faa9asm3925625ejo.164.2023.01.09.09.24.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Jan 2023 09:24:57 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: John G Johnson , Richard Henderson , Igor Mammedov , Elena Ufimtseva , Ani Sinha , Eduardo Habkost , Gerd Hoffmann , Jagannathan Raman , "Michael S. Tsirkin" , Paolo Bonzini , John Snow , Aurelien Jarno , qemu-ppc@nongnu.org, Jiaxun Yang , qemu-block@nongnu.org, Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?Phil?= =?utf-8?q?ippe_Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , qemu-arm@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= , Bernhard Beschow Subject: [PATCH v6 05/33] hw/isa/piix3: Decouple INTx-to-LNKx routing which is board-specific Date: Mon, 9 Jan 2023 18:23:18 +0100 Message-Id: <20230109172347.1830-6-shentey@gmail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230109172347.1830-1-shentey@gmail.com> References: <20230109172347.1830-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::634; envelope-from=shentey@gmail.com; helo=mail-ej1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org pci_map_irq_fn's in general seem to be board-specific. So move PIIX3's pci_slot_get_pirq() to board code to not have PIIX3 make assuptions about its board. Signed-off-by: Bernhard Beschow Reviewed-by: Michael S. Tsirkin Reviewed-by: Philippe Mathieu-Daudé --- hw/i386/pc_piix.c | 15 +++++++++++++++ hw/isa/piix3.c | 13 ------------- 2 files changed, 15 insertions(+), 13 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index b48047f50c..bb3b10557f 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -47,6 +47,7 @@ #include "hw/sysbus.h" #include "hw/i2c/smbus_eeprom.h" #include "hw/xen/xen-x86.h" +#include "hw/xen/xen.h" #include "exec/memory.h" #include "hw/acpi/acpi.h" #include "hw/acpi/piix4.h" @@ -73,6 +74,17 @@ static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; #endif +/* + * Return the global irq number corresponding to a given device irq + * pin. We could also use the bus number to have a more precise mapping. + */ +static int pc_pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) +{ + int slot_addend; + slot_addend = PCI_SLOT(pci_dev->devfn) - 1; + return (pci_intx + slot_addend) & 3; +} + /* PC hardware initialisation */ static void pc_init1(MachineState *machine, const char *host_type, const char *pci_type) @@ -216,6 +228,9 @@ static void pc_init1(MachineState *machine, x86ms->below_4g_mem_size, x86ms->above_4g_mem_size, pci_memory, ram_memory); + pci_bus_map_irqs(pci_bus, + xen_enabled() ? xen_pci_slot_get_pirq + : pc_pci_slot_get_pirq); pcms->bus = pci_bus; pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, type); diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 666e794f77..283b971ec4 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -79,17 +79,6 @@ static void piix3_set_irq(void *opaque, int pirq, int level) piix3_set_irq_level(piix3, pirq, level); } -/* - * Return the global irq number corresponding to a given device irq - * pin. We could also use the bus number to have a more precise mapping. - */ -static int pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) -{ - int slot_addend; - slot_addend = PCI_SLOT(pci_dev->devfn) - 1; - return (pci_intx + slot_addend) & 3; -} - static PCIINTxRoute piix3_route_intx_pin_to_irq(void *opaque, int pin) { PIIX3State *piix3 = opaque; @@ -385,7 +374,6 @@ static void piix3_realize(PCIDevice *dev, Error **errp) } pci_bus_irqs(pci_bus, piix3_set_irq, piix3, PIIX_NUM_PIRQS); - pci_bus_map_irqs(pci_bus, pci_slot_get_pirq); pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq); } @@ -421,7 +409,6 @@ static void piix3_xen_realize(PCIDevice *dev, Error **errp) * These additional routes can be discovered through ACPI. */ pci_bus_irqs(pci_bus, xen_piix3_set_irq, piix3, XEN_PIIX_NUM_PIRQS); - pci_bus_map_irqs(pci_bus, xen_pci_slot_get_pirq); } static void piix3_xen_class_init(ObjectClass *klass, void *data)