diff mbox series

[RFC,26/52] hw: Replace MachineState.smp access with topology helpers for all remaining archs

Message ID 20230213095035.158240-27-zhao1.liu@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series Introduce hybrid CPU topology | expand

Commit Message

Zhao Liu Feb. 13, 2023, 9:50 a.m. UTC
From: Zhao Liu <zhao1.liu@intel.com>

When MachineState.topo is introduced, the topology related structures
become complicated. So we wrapped the access to topology fields of
MachineState.topo into some helpers, and we are using these helpers
to replace the use of MachineState.smp.

For alpha, hppa, intc, openrisc, sparc, sparc64, xtensa, since they
don't ask for "threads per core" or "cores per cluster", it's
straightforward to replace topology access with wrapped generic
interfaces.

Cc: Richard Henderson <richard.henderson@linaro.org>
Cc: Helge Deller <deller@gmx.de>
Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: Greg Kurz <groug@kaod.org>
Cc: Jia Liu <proljc@gmail.com>
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: Artyom Tarasenko <atar4qemu@gmail.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
 hw/alpha/dp264.c             | 2 +-
 hw/hppa/machine.c            | 6 +++---
 hw/intc/spapr_xive_kvm.c     | 3 ++-
 hw/intc/xics_kvm.c           | 3 ++-
 hw/openrisc/openrisc_sim.c   | 2 +-
 hw/openrisc/virt.c           | 2 +-
 hw/sparc/sun4m.c             | 4 ++--
 hw/sparc64/sun4u.c           | 6 ++++--
 hw/xtensa/sim.c              | 2 +-
 hw/xtensa/xtfpga.c           | 2 +-
 target/openrisc/sys_helper.c | 2 +-
 11 files changed, 19 insertions(+), 15 deletions(-)
diff mbox series

Patch

diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 4161f559a7bc..9d0f74d72ede 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -60,7 +60,7 @@  static void clipper_init(MachineState *machine)
     char *palcode_filename;
     uint64_t palcode_entry;
     uint64_t kernel_entry, kernel_low;
-    unsigned int smp_cpus = machine->smp.cpus;
+    unsigned int smp_cpus = machine_topo_get_cpus(machine);
 
     /* Create up to 4 cpus.  */
     memset(cpus, 0, sizeof(cpus));
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 7ac68c943f40..9a3189674ad9 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -124,7 +124,7 @@  static FWCfgState *create_fw_cfg(MachineState *ms)
     uint64_t val;
 
     fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4);
-    fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine_topo_get_cpus(ms));
     fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS);
     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size);
 
@@ -188,7 +188,7 @@  static void machine_hppa_init(MachineState *machine)
     MemoryRegion *rom_region;
     MemoryRegion *cpu_region;
     long i;
-    unsigned int smp_cpus = machine->smp.cpus;
+    unsigned int smp_cpus = machine_topo_get_cpus(machine);
     SysBusDevice *s;
 
     /* Create CPUs.  */
@@ -410,7 +410,7 @@  static void machine_hppa_init(MachineState *machine)
 
 static void hppa_machine_reset(MachineState *ms, ShutdownCause reason)
 {
-    unsigned int smp_cpus = ms->smp.cpus;
+    unsigned int smp_cpus = machine_topo_get_cpus(ms);
     int i;
 
     qemu_devices_reset(reason);
diff --git a/hw/intc/spapr_xive_kvm.c b/hw/intc/spapr_xive_kvm.c
index 61fe7bd2d322..bdb021abceb2 100644
--- a/hw/intc/spapr_xive_kvm.c
+++ b/hw/intc/spapr_xive_kvm.c
@@ -174,7 +174,8 @@  int kvmppc_xive_cpu_connect(XiveTCTX *tctx, Error **errp)
                          vcpu_id);
         if (ret == -ENOSPC) {
             error_append_hint(errp, "Try -smp maxcpus=N with N < %u\n",
-                              MACHINE(qdev_get_machine())->smp.max_cpus);
+                              machine_topo_get_max_cpus(
+                                  MACHINE(qdev_get_machine())));
         }
         return ret;
     }
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index 9719d98a179e..f45cc0af8b1e 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -169,7 +169,8 @@  void icp_kvm_realize(DeviceState *dev, Error **errp)
                    vcpu_id, strerror(errno));
         if (errno == ENOSPC) {
             error_append_hint(&local_err, "Try -smp maxcpus=N with N < %u\n",
-                              MACHINE(qdev_get_machine())->smp.max_cpus);
+                              machine_topo_get_max_cpus(
+                                  MACHINE(qdev_get_machine())));
         }
         error_propagate(errp, local_err);
         return;
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 35da123aef4c..98dcbde924a8 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -291,7 +291,7 @@  static void openrisc_sim_init(MachineState *machine)
     MemoryRegion *ram;
     hwaddr load_addr;
     int n;
-    unsigned int smp_cpus = machine->smp.cpus;
+    unsigned int smp_cpus = machine_topo_get_cpus(machine);
 
     assert(smp_cpus >= 1 && smp_cpus <= OR1KSIM_CPUS_MAX);
     for (n = 0; n < smp_cpus; n++) {
diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c
index f8a68a6a6b1f..730013142ca9 100644
--- a/hw/openrisc/virt.c
+++ b/hw/openrisc/virt.c
@@ -476,7 +476,7 @@  static void openrisc_virt_init(MachineState *machine)
     MemoryRegion *ram;
     hwaddr load_addr;
     int n;
-    unsigned int smp_cpus = machine->smp.cpus;
+    unsigned int smp_cpus = machine_topo_get_cpus(machine);
     int32_t pic_phandle;
 
     assert(smp_cpus >= 1 && smp_cpus <= VIRT_CPUS_MAX);
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index d9288326d6ac..09f4beaa01df 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -829,8 +829,8 @@  static void sun4m_hw_init(MachineState *machine)
     FWCfgState *fw_cfg;
     DeviceState *dev, *ms_kb_orgate, *serial_orgate;
     SysBusDevice *s;
-    unsigned int smp_cpus = machine->smp.cpus;
-    unsigned int max_cpus = machine->smp.max_cpus;
+    unsigned int smp_cpus = machine_topo_get_cpus(machine);
+    unsigned int max_cpus = machine_topo_get_max_cpus(machine);
     HostMemoryBackend *ram_memdev = machine->memdev;
     NICInfo *nd = &nd_table[0];
 
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 387181ff7762..c0350311e405 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -711,8 +711,10 @@  static void sun4uv_init(MemoryRegion *address_space_mem,
                                 &FW_CFG_IO(dev)->comb_iomem);
 
     fw_cfg = FW_CFG(dev);
-    fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)machine->smp.cpus);
-    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS,
+                   (uint16_t)machine_topo_get_cpus(machine));
+    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS,
+                   (uint16_t)machine_topo_get_max_cpus(machine));
     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
     fw_cfg_add_i64(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_entry);
diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
index 946c71cb5b5c..dc2f95554311 100644
--- a/hw/xtensa/sim.c
+++ b/hw/xtensa/sim.c
@@ -58,7 +58,7 @@  XtensaCPU *xtensa_sim_common_init(MachineState *machine)
     ram_addr_t ram_size = machine->ram_size;
     int n;
 
-    for (n = 0; n < machine->smp.cpus; n++) {
+    for (n = 0; n < machine_topo_get_cpus(machine); n++) {
         cpu = XTENSA_CPU(cpu_create(machine->cpu_type));
         env = &cpu->env;
 
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index 2a5556a35f50..70c308dd1bf6 100644
--- a/hw/xtensa/xtfpga.c
+++ b/hw/xtensa/xtfpga.c
@@ -239,7 +239,7 @@  static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
     const unsigned system_io_size = 224 * MiB;
     uint32_t freq = 10000000;
     int n;
-    unsigned int smp_cpus = machine->smp.cpus;
+    unsigned int smp_cpus = machine_topo_get_cpus(machine);
 
     if (smp_cpus > 1) {
         mx_pic = xtensa_mx_pic_init(31);
diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
index ec145960e3e5..3f3e57291035 100644
--- a/target/openrisc/sys_helper.c
+++ b/target/openrisc/sys_helper.c
@@ -262,7 +262,7 @@  target_ulong HELPER(mfspr)(CPUOpenRISCState *env, target_ulong rd,
         return cpu->parent_obj.cpu_index;
 
     case TO_SPR(0, 129): /* NUMCORES */
-        return ms->smp.max_cpus;
+        return machine_topo_get_max_cpus(ms);
 
     case TO_SPR(0, 1024) ... TO_SPR(0, 1024 + (16 * 32)): /* Shadow GPRs */
         idx = (spr - 1024);