Message ID | 20230214083833.44205-8-liweiwei@iscas.ac.cn (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | target/riscv: Some updates to float point related extensions | expand |
On 2/14/23 05:38, Weiwei Li wrote: > Fix indent problems in vector related check > > Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> > Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> > --- Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > target/riscv/cpu.c | 44 ++++++++++++++++++++++---------------------- > 1 file changed, 22 insertions(+), 22 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 8fe76707a0..73711d392d 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -798,7 +798,7 @@ static void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp) > } > if (cpu->cfg.ext_f) { > error_setg(errp, > - "Zfinx cannot be supported together with F extension"); > + "Zfinx cannot be supported together with F extension"); > return; > } > } > @@ -861,40 +861,40 @@ static void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp) > ext |= RVV; > if (!is_power_of_2(cpu->cfg.vlen)) { > error_setg(errp, > - "Vector extension VLEN must be power of 2"); > + "Vector extension VLEN must be power of 2"); > return; > } > if (cpu->cfg.vlen > RV_VLEN_MAX || cpu->cfg.vlen < 128) { > error_setg(errp, > - "Vector extension implementation only supports VLEN " > - "in the range [128, %d]", RV_VLEN_MAX); > + "Vector extension implementation only supports VLEN " > + "in the range [128, %d]", RV_VLEN_MAX); > return; > } > if (!is_power_of_2(cpu->cfg.elen)) { > error_setg(errp, > - "Vector extension ELEN must be power of 2"); > + "Vector extension ELEN must be power of 2"); > return; > } > - if (cpu->cfg.elen > 64 || cpu->cfg.elen < 8) { > - error_setg(errp, > - "Vector extension implementation only supports ELEN " > - "in the range [8, 64]"); > - return; > - } > - if (cpu->cfg.vext_spec) { > - if (!g_strcmp0(cpu->cfg.vext_spec, "v1.0")) { > - vext_version = VEXT_VERSION_1_00_0; > - } else { > + if (cpu->cfg.elen > 64 || cpu->cfg.elen < 8) { > error_setg(errp, > - "Unsupported vector spec version '%s'", > - cpu->cfg.vext_spec); > + "Vector extension implementation only supports ELEN " > + "in the range [8, 64]"); > return; > } > - } else { > - qemu_log("vector version is not specified, " > - "use the default value v1.0\n"); > - } > - set_vext_version(env, vext_version); > + if (cpu->cfg.vext_spec) { > + if (!g_strcmp0(cpu->cfg.vext_spec, "v1.0")) { > + vext_version = VEXT_VERSION_1_00_0; > + } else { > + error_setg(errp, > + "Unsupported vector spec version '%s'", > + cpu->cfg.vext_spec); > + return; > + } > + } else { > + qemu_log("vector version is not specified, " > + "use the default value v1.0\n"); > + } > + set_vext_version(env, vext_version); > } > if (cpu->cfg.ext_j) { > ext |= RVJ;
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 8fe76707a0..73711d392d 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -798,7 +798,7 @@ static void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp) } if (cpu->cfg.ext_f) { error_setg(errp, - "Zfinx cannot be supported together with F extension"); + "Zfinx cannot be supported together with F extension"); return; } } @@ -861,40 +861,40 @@ static void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp) ext |= RVV; if (!is_power_of_2(cpu->cfg.vlen)) { error_setg(errp, - "Vector extension VLEN must be power of 2"); + "Vector extension VLEN must be power of 2"); return; } if (cpu->cfg.vlen > RV_VLEN_MAX || cpu->cfg.vlen < 128) { error_setg(errp, - "Vector extension implementation only supports VLEN " - "in the range [128, %d]", RV_VLEN_MAX); + "Vector extension implementation only supports VLEN " + "in the range [128, %d]", RV_VLEN_MAX); return; } if (!is_power_of_2(cpu->cfg.elen)) { error_setg(errp, - "Vector extension ELEN must be power of 2"); + "Vector extension ELEN must be power of 2"); return; } - if (cpu->cfg.elen > 64 || cpu->cfg.elen < 8) { - error_setg(errp, - "Vector extension implementation only supports ELEN " - "in the range [8, 64]"); - return; - } - if (cpu->cfg.vext_spec) { - if (!g_strcmp0(cpu->cfg.vext_spec, "v1.0")) { - vext_version = VEXT_VERSION_1_00_0; - } else { + if (cpu->cfg.elen > 64 || cpu->cfg.elen < 8) { error_setg(errp, - "Unsupported vector spec version '%s'", - cpu->cfg.vext_spec); + "Vector extension implementation only supports ELEN " + "in the range [8, 64]"); return; } - } else { - qemu_log("vector version is not specified, " - "use the default value v1.0\n"); - } - set_vext_version(env, vext_version); + if (cpu->cfg.vext_spec) { + if (!g_strcmp0(cpu->cfg.vext_spec, "v1.0")) { + vext_version = VEXT_VERSION_1_00_0; + } else { + error_setg(errp, + "Unsupported vector spec version '%s'", + cpu->cfg.vext_spec); + return; + } + } else { + qemu_log("vector version is not specified, " + "use the default value v1.0\n"); + } + set_vext_version(env, vext_version); } if (cpu->cfg.ext_j) { ext |= RVJ;