From patchwork Thu Feb 16 21:55:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13144068 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7F403C636CC for ; Thu, 16 Feb 2023 21:58:17 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pSmEp-000330-Se; Thu, 16 Feb 2023 16:56:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pSmEl-0002zD-G2 for qemu-devel@nongnu.org; Thu, 16 Feb 2023 16:56:19 -0500 Received: from mail-oi1-x234.google.com ([2607:f8b0:4864:20::234]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pSmEj-0001zd-7m for qemu-devel@nongnu.org; Thu, 16 Feb 2023 16:56:19 -0500 Received: by mail-oi1-x234.google.com with SMTP id 26so1949736oix.7 for ; Thu, 16 Feb 2023 13:56:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iJTVGRg5y1OUwF0Xq7v/Y4t4UPRS0fpUHQSzmbdLKi0=; b=bCiEBnREjehUoAltxys8iq0KGELqdKMs6PNj9hGxmAtYvYihc5c6ysiCRMJ8QeABk+ oVJJo9YZaE4vmk/P9nWVIOW/PVdZB9njNNhgOnCHZJ1cQhIR2yjyNY0DaeGyPM2QA9fo nAfmSCTz6JjkUpF0lV0wxS8uWEAMInUN/u3VQQUrAHOrLUKRAYgOaXgbQeKLGCBDRepo 5f65NItr3wRGYTuCqltXNnrwRPVKaVNjNUeI6ZYKh0vTzIIN417rzzUr9T3oKBCVgSzS bB0Q6RvH5yS+Uz9xWeIfb/4GIEdcuWXMJzdZ5WN3c6IA75OW5U8KcaFV0Bn4smL34tPD bqtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iJTVGRg5y1OUwF0Xq7v/Y4t4UPRS0fpUHQSzmbdLKi0=; b=bU5ngLBrKMydDMkIQRqKoCUFAOsD6wKgVrvrScf5aZc1e62BzLBOJX4i2C2j6aUB+L 8CJGIzjT5tFk2Ol2IOwhRXEeV2OzYNHsEMLJE8qO/lRTah6XPZxZKpfO6dR1BDsR5/Cj yCxW8QlDDPR4WLlHxUYtcjcN9xUaQyxv2vSCwSVnlUnde6/FxHqv5pDROsyp2qAsR/96 pKsiMR6GJuQ0sGb+Fj0TATcJPt2OOVvx1zbJu5q7So5Hi/Js2NF+vJX/LNX77A/5wd7X NQ6pKoiPAYaCrVxSnRFLBO6YxZ+OeK6fdqVJFxrNM5/PAtrAx4ol9wedYceu5nqzkz/m yVHw== X-Gm-Message-State: AO0yUKXYmxHhC05sahuZ7ZfyHLCTG/IA5A0CEzHrKfpJLWPHqrhzAzAt iPKrzQrUFhWcFeVbG0PWpcLqJU/tHfBOavdt X-Google-Smtp-Source: AK7set9MaRdSvjIgMbVVSQaCHjs0N9mMXuB7k14VKavpyrpIcQs72nR5PsTAHgW1d2q3UnKL7La6iw== X-Received: by 2002:a05:6808:d8:b0:378:12b9:b31e with SMTP id t24-20020a05680800d800b0037812b9b31emr2833607oic.27.1676584575305; Thu, 16 Feb 2023 13:56:15 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([191.19.40.109]) by smtp.gmail.com with ESMTPSA id i132-20020acaea8a000000b0037d7f4d0890sm1047570oih.26.2023.02.16.13.56.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Feb 2023 13:56:14 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, richard.henderson@linaro.org, Daniel Henrique Barboza , Andrew Jones Subject: [PATCH v6 6/9] target/riscv: remove RISCV_FEATURE_PMP Date: Thu, 16 Feb 2023 18:55:47 -0300 Message-Id: <20230216215550.1011637-7-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230216215550.1011637-1-dbarboza@ventanamicro.com> References: <20230216215550.1011637-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::234; envelope-from=dbarboza@ventanamicro.com; helo=mail-oi1-x234.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org RISCV_FEATURE_PMP is being set via riscv_set_feature() by mirroring the cpu->cfg.pmp flag. Use the flag instead. Signed-off-by: Daniel Henrique Barboza Reviewed-by: Weiwei Li Reviewed-by: Bin Meng Reviewed-by: Andrew Jones Reviewed-by: LIU Zhiwei --- target/riscv/cpu.c | 4 ---- target/riscv/cpu.h | 1 - target/riscv/cpu_helper.c | 2 +- target/riscv/csr.c | 2 +- target/riscv/machine.c | 3 +-- target/riscv/op_helper.c | 2 +- target/riscv/pmp.c | 2 +- 7 files changed, 5 insertions(+), 11 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 71b2042d73..7b1360d6ba 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -923,10 +923,6 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) riscv_set_feature(env, RISCV_FEATURE_MMU); } - if (cpu->cfg.pmp) { - riscv_set_feature(env, RISCV_FEATURE_PMP); - } - if (cpu->cfg.epmp && !cpu->cfg.pmp) { /* * Enhanced PMP should only be available diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 6d659d74fa..119a022af9 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -87,7 +87,6 @@ so a cpu features bitfield is required, likewise for optional PMP support */ enum { RISCV_FEATURE_MMU, - RISCV_FEATURE_PMP, }; /* Privileged specification version */ diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 4cdd247c6c..292b6b3168 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -706,7 +706,7 @@ static int get_physical_address_pmp(CPURISCVState *env, int *prot, pmp_priv_t pmp_priv; int pmp_index = -1; - if (!riscv_feature(env, RISCV_FEATURE_PMP)) { + if (!riscv_cpu_cfg(env)->pmp) { *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; return TRANSLATE_SUCCESS; } diff --git a/target/riscv/csr.c b/target/riscv/csr.c index cdc68d3676..d0ab00d870 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -419,7 +419,7 @@ static int aia_hmode32(CPURISCVState *env, int csrno) static RISCVException pmp(CPURISCVState *env, int csrno) { - if (riscv_feature(env, RISCV_FEATURE_PMP)) { + if (riscv_cpu_cfg(env)->pmp) { return RISCV_EXCP_NONE; } diff --git a/target/riscv/machine.c b/target/riscv/machine.c index 4634968898..67e9e56853 100644 --- a/target/riscv/machine.c +++ b/target/riscv/machine.c @@ -27,9 +27,8 @@ static bool pmp_needed(void *opaque) { RISCVCPU *cpu = opaque; - CPURISCVState *env = &cpu->env; - return riscv_feature(env, RISCV_FEATURE_PMP); + return cpu->cfg.pmp; } static int pmp_post_load(void *opaque, int version_id) diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 48f918b71b..9c0b91c88f 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -195,7 +195,7 @@ target_ulong helper_mret(CPURISCVState *env) uint64_t mstatus = env->mstatus; target_ulong prev_priv = get_field(mstatus, MSTATUS_MPP); - if (riscv_feature(env, RISCV_FEATURE_PMP) && + if (riscv_cpu_cfg(env)->pmp && !pmp_get_num_rules(env) && (prev_priv != PRV_M)) { riscv_raise_exception(env, RISCV_EXCP_INST_ACCESS_FAULT, GETPC()); } diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index aa4d1996e9..205bfbe090 100644 --- a/target/riscv/pmp.c +++ b/target/riscv/pmp.c @@ -265,7 +265,7 @@ static bool pmp_hart_has_privs_default(CPURISCVState *env, target_ulong addr, } } - if ((!riscv_feature(env, RISCV_FEATURE_PMP)) || (mode == PRV_M)) { + if (!riscv_cpu_cfg(env)->pmp || (mode == PRV_M)) { /* * Privileged spec v1.10 states if HW doesn't implement any PMP entry * or no PMP entry matches an M-Mode access, the access succeeds.