| Message ID | 20230223202053.117050-2-shentey@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | VT82xx PCI fixes and audio output support | expand |
On 23/02/2023 20:20, Bernhard Beschow wrote: > The firmware of the real PegasosII board routes all PIRQx to IRQ9, so do > the same in QEMU. The PCI_INTERRUPT_LINE registers of the respective > internal PCI functions are already initialized with IRQ9 which are > currently used for routing. > > Note that the PCI interrupt router isn't implemented yet in the VIA > south bridges. This change has therefore no effect until this happens. > > Inspired-by: > <c046d77c20875c8cd8bfdc79b4619a98ffd0bf33.1677004415.git.balaton@eik.bme.hu> > ("hw/ppc/pegasos2: Fix PCI interrupt routing") > > Signed-off-by: Bernhard Beschow <shentey@gmail.com> > --- > hw/ppc/pegasos2.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c > index a9563f4fb2..41688699eb 100644 > --- a/hw/ppc/pegasos2.c > +++ b/hw/ppc/pegasos2.c > @@ -268,6 +268,12 @@ static void pegasos2_machine_reset(MachineState *machine, ShutdownCause reason) > PCI_INTERRUPT_LINE, 2, 0x9); > pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | > 0x50, 1, 0x2); > + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | > + 0x55, 1, 0x90); > + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | > + 0x56, 1, 0x99); > + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | > + 0x57, 1, 0x90); > > pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) | > PCI_INTERRUPT_LINE, 2, 0x109); The patch looks okay, but I think the commit message doesn't quite represent why it is required. I presume this configures the PCI IRQ router in the same way as the firmware so that it is possible to launch Linux directly with -kernel? ATB, Mark.
On Wed, 1 Mar 2023, Mark Cave-Ayland wrote: > On 23/02/2023 20:20, Bernhard Beschow wrote: > >> The firmware of the real PegasosII board routes all PIRQx to IRQ9, so do >> the same in QEMU. The PCI_INTERRUPT_LINE registers of the respective >> internal PCI functions are already initialized with IRQ9 which are >> currently used for routing. >> >> Note that the PCI interrupt router isn't implemented yet in the VIA >> south bridges. This change has therefore no effect until this happens. >> >> Inspired-by: >> <c046d77c20875c8cd8bfdc79b4619a98ffd0bf33.1677004415.git.balaton@eik.bme.hu> >> ("hw/ppc/pegasos2: Fix PCI interrupt routing") >> >> Signed-off-by: Bernhard Beschow <shentey@gmail.com> >> --- >> hw/ppc/pegasos2.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c >> index a9563f4fb2..41688699eb 100644 >> --- a/hw/ppc/pegasos2.c >> +++ b/hw/ppc/pegasos2.c >> @@ -268,6 +268,12 @@ static void pegasos2_machine_reset(MachineState >> *machine, ShutdownCause reason) >> PCI_INTERRUPT_LINE, 2, 0x9); >> pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | >> 0x50, 1, 0x2); >> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | >> + 0x55, 1, 0x90); >> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | >> + 0x56, 1, 0x99); >> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | >> + 0x57, 1, 0x90); >> pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) | >> PCI_INTERRUPT_LINE, 2, 0x109); > > The patch looks okay, but I think the commit message doesn't quite represent > why it is required. I presume this configures the PCI IRQ router in the same > way as the firmware so that it is possible to launch Linux directly with > -kernel? You're commenting on old versions. Please only review v5 now which is the last version we're about to commit for 8.0. You can read through older discussion to see where we are but probably not much use to comment on those now. Regards, BALATON Zoltan
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c index a9563f4fb2..41688699eb 100644 --- a/hw/ppc/pegasos2.c +++ b/hw/ppc/pegasos2.c @@ -268,6 +268,12 @@ static void pegasos2_machine_reset(MachineState *machine, ShutdownCause reason) PCI_INTERRUPT_LINE, 2, 0x9); pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | 0x50, 1, 0x2); + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | + 0x55, 1, 0x90); + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | + 0x56, 1, 0x99); + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | + 0x57, 1, 0x90); pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 1) << 8) | PCI_INTERRUPT_LINE, 2, 0x109);
The firmware of the real PegasosII board routes all PIRQx to IRQ9, so do the same in QEMU. The PCI_INTERRUPT_LINE registers of the respective internal PCI functions are already initialized with IRQ9 which are currently used for routing. Note that the PCI interrupt router isn't implemented yet in the VIA south bridges. This change has therefore no effect until this happens. Inspired-by: <c046d77c20875c8cd8bfdc79b4619a98ffd0bf33.1677004415.git.balaton@eik.bme.hu> ("hw/ppc/pegasos2: Fix PCI interrupt routing") Signed-off-by: Bernhard Beschow <shentey@gmail.com> --- hw/ppc/pegasos2.c | 6 ++++++ 1 file changed, 6 insertions(+)