@@ -1018,6 +1018,9 @@ static void riscv_cpu_disable_priv_spec_isa_exts(RISCVCPU *cpu)
static void riscv_cpu_validate_misa_ext(RISCVCPU *cpu, Error **errp)
{
+ CPURISCVState *env = &cpu->env;
+ Error *local_err = NULL;
+
if (cpu->cfg.ext_i && cpu->cfg.ext_e) {
error_setg(errp,
"I and E extensions are incompatible");
@@ -1051,6 +1054,14 @@ static void riscv_cpu_validate_misa_ext(RISCVCPU *cpu, Error **errp)
error_setg(errp, "D extension requires F extension");
return;
}
+
+ if (cpu->cfg.ext_v) {
+ riscv_cpu_validate_v(env, &cpu->cfg, &local_err);
+ if (local_err != NULL) {
+ error_propagate(errp, local_err);
+ return;
+ }
+ }
}
static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu, Error **errp)
@@ -1088,7 +1099,6 @@ static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu, Error **errp)
static void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp)
{
CPURISCVState *env = &cpu->env;
- Error *local_err = NULL;
uint32_t ext = 0;
if (cpu->cfg.epmp && !cpu->cfg.pmp) {
@@ -1179,14 +1189,6 @@ static void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp)
}
}
- if (cpu->cfg.ext_v) {
- riscv_cpu_validate_v(env, &cpu->cfg, &local_err);
- if (local_err != NULL) {
- error_propagate(errp, local_err);
- return;
- }
- }
-
if (cpu->cfg.ext_zk) {
cpu->cfg.ext_zkn = true;
cpu->cfg.ext_zkr = true;
riscv_cpu_validate_v() consists of checking RVV related attributes, such as vlen and elen, and setting env->vext_spec. This can be done during riscv_cpu_validate_misa_ext() time, allowing us to fail earlier if RVV constrains are not met. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> --- target/riscv/cpu.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-)