Message ID | 20230327080858.39703-3-liweiwei@iscas.ac.cn (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | target/riscv: Simplification for RVH related check and code style fix | expand |
On Mon, Mar 27, 2023 at 6:10 PM Weiwei Li <liweiwei@iscas.ac.cn> wrote: > > Check on riscv_cpu_virt_enabled contains the check on RVH. > > Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> > Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/op_helper.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c > index 84ee018f7d..1eecae9547 100644 > --- a/target/riscv/op_helper.c > +++ b/target/riscv/op_helper.c > @@ -278,8 +278,7 @@ target_ulong helper_sret(CPURISCVState *env) > riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); > } > > - if (riscv_has_ext(env, RVH) && riscv_cpu_virt_enabled(env) && > - get_field(env->hstatus, HSTATUS_VTSR)) { > + if (riscv_cpu_virt_enabled(env) && get_field(env->hstatus, HSTATUS_VTSR)) { > riscv_raise_exception(env, RISCV_EXCP_VIRT_INSTRUCTION_FAULT, GETPC()); > } > > -- > 2.25.1 > >
diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index 84ee018f7d..1eecae9547 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -278,8 +278,7 @@ target_ulong helper_sret(CPURISCVState *env) riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC()); } - if (riscv_has_ext(env, RVH) && riscv_cpu_virt_enabled(env) && - get_field(env->hstatus, HSTATUS_VTSR)) { + if (riscv_cpu_virt_enabled(env) && get_field(env->hstatus, HSTATUS_VTSR)) { riscv_raise_exception(env, RISCV_EXCP_VIRT_INSTRUCTION_FAULT, GETPC()); }