| Message ID | 20230328054654.18620-5-qianfanguijin@163.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | *** add allwinner-r40 support *** | expand |
On Tue, Mar 28, 2023 at 7:47 AM <qianfanguijin@163.com> wrote: > > From: qianfan Zhao <qianfanguijin@163.com> > > TWI(i2c) is designed to be used as an interface between CPU host and the > serial 2-Wire bus. It can support all standard 2-Wire transfer, can be > operated in standard mode(100kbit/s) or fast-mode, supporting data rate > up to 400kbit/s. > > Signed-off-by: qianfan Zhao <qianfanguijin@163.com> > --- > hw/arm/allwinner-r40.c | 11 ++++++++++- > include/hw/arm/allwinner-r40.h | 3 +++ > 2 files changed, 13 insertions(+), 1 deletion(-) > > diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c > index 537a90b23d..4bc582630c 100644 > --- a/hw/arm/allwinner-r40.c > +++ b/hw/arm/allwinner-r40.c > @@ -52,6 +52,7 @@ const hwaddr allwinner_r40_memmap[] = { > [AW_R40_DEV_UART5] = 0x01c29400, > [AW_R40_DEV_UART6] = 0x01c29800, > [AW_R40_DEV_UART7] = 0x01c29c00, > + [AW_R40_DEV_TWI0] = 0x01c2ac00, > [AW_R40_DEV_GIC_DIST] = 0x01c81000, > [AW_R40_DEV_GIC_CPU] = 0x01c82000, > [AW_R40_DEV_GIC_HYP] = 0x01c84000, > @@ -115,7 +116,6 @@ static struct AwR40Unimplemented r40_unimplemented[] = { > { "uart7", 0x01c29c00, 1 * KiB }, > { "ps20", 0x01c2a000, 1 * KiB }, > { "ps21", 0x01c2a400, 1 * KiB }, > - { "twi0", 0x01c2ac00, 1 * KiB }, > { "twi1", 0x01c2b000, 1 * KiB }, > { "twi2", 0x01c2b400, 1 * KiB }, > { "twi3", 0x01c2b800, 1 * KiB }, > @@ -167,6 +167,7 @@ enum { > AW_R40_GIC_SPI_UART1 = 2, > AW_R40_GIC_SPI_UART2 = 3, > AW_R40_GIC_SPI_UART3 = 4, > + AW_R40_GIC_SPI_TWI0 = 7, > AW_R40_GIC_SPI_UART4 = 17, > AW_R40_GIC_SPI_UART5 = 18, > AW_R40_GIC_SPI_UART6 = 19, > @@ -270,6 +271,8 @@ static void allwinner_r40_init(Object *obj) > object_initialize_child(obj, mmc_names[i], &s->mmc[i], > TYPE_AW_SDHOST_SUN5I); > } > + > + object_initialize_child(obj, "twi0", &s->i2c0, TYPE_AW_I2C_SUN6I); > } > > static void allwinner_r40_realize(DeviceState *dev, Error **errp) > @@ -416,6 +419,12 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp) > 115200, serial_hd(i), DEVICE_NATIVE_ENDIAN); > } > > + /* I2C */ > + sysbus_realize(SYS_BUS_DEVICE(&s->i2c0), &error_fatal); > + sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c0), 0, s->memmap[AW_R40_DEV_TWI0]); > + sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c0), 0, > + qdev_get_gpio_in(DEVICE(&s->gic), AW_R40_GIC_SPI_TWI0)); > + > /* Unimplemented devices */ > for (i = 0; i < ARRAY_SIZE(r40_unimplemented); i++) { > create_unimplemented_device(r40_unimplemented[i].device_name, > diff --git a/include/hw/arm/allwinner-r40.h b/include/hw/arm/allwinner-r40.h > index 959b5dc4e0..95366f4eee 100644 > --- a/include/hw/arm/allwinner-r40.h > +++ b/include/hw/arm/allwinner-r40.h > @@ -26,6 +26,7 @@ > #include "hw/intc/arm_gic.h" > #include "hw/sd/allwinner-sdhost.h" > #include "hw/misc/allwinner-r40-ccu.h" > +#include "hw/i2c/allwinner-i2c.h" > #include "target/arm/cpu.h" > #include "sysemu/block-backend.h" > > @@ -48,6 +49,7 @@ enum { > AW_R40_DEV_UART5, > AW_R40_DEV_UART6, > AW_R40_DEV_UART7, > + AW_R40_DEV_TWI0, > AW_R40_DEV_GIC_DIST, > AW_R40_DEV_GIC_CPU, > AW_R40_DEV_GIC_HYP, > @@ -89,6 +91,7 @@ struct AwR40State { > AwA10PITState timer; > AwSdHostState mmc[AW_R40_NUM_MMCS]; > AwR40ClockCtlState ccu; > + AWI2CState i2c0; > GICState gic; > MemoryRegion sram_a1; > MemoryRegion sram_a2; > -- > 2.25.1 > Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Best regards, Strahinja
diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c index 537a90b23d..4bc582630c 100644 --- a/hw/arm/allwinner-r40.c +++ b/hw/arm/allwinner-r40.c @@ -52,6 +52,7 @@ const hwaddr allwinner_r40_memmap[] = { [AW_R40_DEV_UART5] = 0x01c29400, [AW_R40_DEV_UART6] = 0x01c29800, [AW_R40_DEV_UART7] = 0x01c29c00, + [AW_R40_DEV_TWI0] = 0x01c2ac00, [AW_R40_DEV_GIC_DIST] = 0x01c81000, [AW_R40_DEV_GIC_CPU] = 0x01c82000, [AW_R40_DEV_GIC_HYP] = 0x01c84000, @@ -115,7 +116,6 @@ static struct AwR40Unimplemented r40_unimplemented[] = { { "uart7", 0x01c29c00, 1 * KiB }, { "ps20", 0x01c2a000, 1 * KiB }, { "ps21", 0x01c2a400, 1 * KiB }, - { "twi0", 0x01c2ac00, 1 * KiB }, { "twi1", 0x01c2b000, 1 * KiB }, { "twi2", 0x01c2b400, 1 * KiB }, { "twi3", 0x01c2b800, 1 * KiB }, @@ -167,6 +167,7 @@ enum { AW_R40_GIC_SPI_UART1 = 2, AW_R40_GIC_SPI_UART2 = 3, AW_R40_GIC_SPI_UART3 = 4, + AW_R40_GIC_SPI_TWI0 = 7, AW_R40_GIC_SPI_UART4 = 17, AW_R40_GIC_SPI_UART5 = 18, AW_R40_GIC_SPI_UART6 = 19, @@ -270,6 +271,8 @@ static void allwinner_r40_init(Object *obj) object_initialize_child(obj, mmc_names[i], &s->mmc[i], TYPE_AW_SDHOST_SUN5I); } + + object_initialize_child(obj, "twi0", &s->i2c0, TYPE_AW_I2C_SUN6I); } static void allwinner_r40_realize(DeviceState *dev, Error **errp) @@ -416,6 +419,12 @@ static void allwinner_r40_realize(DeviceState *dev, Error **errp) 115200, serial_hd(i), DEVICE_NATIVE_ENDIAN); } + /* I2C */ + sysbus_realize(SYS_BUS_DEVICE(&s->i2c0), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c0), 0, s->memmap[AW_R40_DEV_TWI0]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c0), 0, + qdev_get_gpio_in(DEVICE(&s->gic), AW_R40_GIC_SPI_TWI0)); + /* Unimplemented devices */ for (i = 0; i < ARRAY_SIZE(r40_unimplemented); i++) { create_unimplemented_device(r40_unimplemented[i].device_name, diff --git a/include/hw/arm/allwinner-r40.h b/include/hw/arm/allwinner-r40.h index 959b5dc4e0..95366f4eee 100644 --- a/include/hw/arm/allwinner-r40.h +++ b/include/hw/arm/allwinner-r40.h @@ -26,6 +26,7 @@ #include "hw/intc/arm_gic.h" #include "hw/sd/allwinner-sdhost.h" #include "hw/misc/allwinner-r40-ccu.h" +#include "hw/i2c/allwinner-i2c.h" #include "target/arm/cpu.h" #include "sysemu/block-backend.h" @@ -48,6 +49,7 @@ enum { AW_R40_DEV_UART5, AW_R40_DEV_UART6, AW_R40_DEV_UART7, + AW_R40_DEV_TWI0, AW_R40_DEV_GIC_DIST, AW_R40_DEV_GIC_CPU, AW_R40_DEV_GIC_HYP, @@ -89,6 +91,7 @@ struct AwR40State { AwA10PITState timer; AwSdHostState mmc[AW_R40_NUM_MMCS]; AwR40ClockCtlState ccu; + AWI2CState i2c0; GICState gic; MemoryRegion sram_a1; MemoryRegion sram_a2;