| Message ID | 20230411142440.8018-5-minhquangbui99@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [REPOST,v3,1/5] i386/tcg: implement x2APIC registers MSR access | expand |
On Tue, Apr 11, 2023 at 09:24:39PM +0700, Bui Quang Minh wrote: > As userspace APIC now supports x2APIC, intel interrupt remapping > hardware can be set to EIM mode when userspace local APIC is used. > > Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> > --- > hw/i386/intel_iommu.c | 11 ----------- > 1 file changed, 11 deletions(-) > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > index a62896759c..fd7c16b852 100644 > --- a/hw/i386/intel_iommu.c > +++ b/hw/i386/intel_iommu.c > @@ -4045,17 +4045,6 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp) > && x86_iommu_ir_supported(x86_iommu) ? > ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; > } > - if (s->intr_eim == ON_OFF_AUTO_ON && !s->buggy_eim) { > - if (!kvm_irqchip_is_split()) { > - error_setg(errp, "eim=on requires accel=kvm,kernel-irqchip=split"); > - return false; > - } > - if (!kvm_enable_x2apic()) { > - error_setg(errp, "eim=on requires support on the KVM side" > - "(X2APIC_API, first shipped in v4.7)"); > - return false; > - } > - } > > /* Currently only address widths supported are 39 and 48 bits */ > if ((s->aw_bits != VTD_HOST_AW_39BIT) && Paolo I think if you ack the kvm bits, I can merge. > -- > 2.25.1 > >
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index a62896759c..fd7c16b852 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -4045,17 +4045,6 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp) && x86_iommu_ir_supported(x86_iommu) ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; } - if (s->intr_eim == ON_OFF_AUTO_ON && !s->buggy_eim) { - if (!kvm_irqchip_is_split()) { - error_setg(errp, "eim=on requires accel=kvm,kernel-irqchip=split"); - return false; - } - if (!kvm_enable_x2apic()) { - error_setg(errp, "eim=on requires support on the KVM side" - "(X2APIC_API, first shipped in v4.7)"); - return false; - } - } /* Currently only address widths supported are 39 and 48 bits */ if ((s->aw_bits != VTD_HOST_AW_39BIT) &&
As userspace APIC now supports x2APIC, intel interrupt remapping hardware can be set to EIM mode when userspace local APIC is used. Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> --- hw/i386/intel_iommu.c | 11 ----------- 1 file changed, 11 deletions(-)