From patchwork Thu May 25 16:48:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13255457 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59AAEC77B7E for ; Thu, 25 May 2023 16:49:06 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q2E8f-0007eI-VH; Thu, 25 May 2023 12:48:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q2E8Y-0007ag-82 for qemu-devel@nongnu.org; Thu, 25 May 2023 12:48:27 -0400 Received: from mail-ot1-x332.google.com ([2607:f8b0:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q2E8O-00053j-GD for qemu-devel@nongnu.org; Thu, 25 May 2023 12:48:25 -0400 Received: by mail-ot1-x332.google.com with SMTP id 46e09a7af769-6af9dcc98f0so1311710a34.0 for ; Thu, 25 May 2023 09:48:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1685033295; x=1687625295; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2DlfcKG/pJUr8Qa+/DBUqov9JmpCu0jzQoJykH4Lc90=; b=Do8RxjCThaem2YZlIK0ZrWEoXP7G1od/nuKuS6osKCClnnNPhMtNn56Kuir0ru9HtP 7XQAJddZaVRjTrJC+AK0YLqmtiXRzkc2GvMvQxH+bwoj0Vp8sFzvWHeVRBHO5dLYxcvv 1UhxgCF2pfQNFTcPQXhgC6JfOPfYjVdcpsvGr19rDs7GyYEGOkrJrC8wwp0pDzAcPviL xy9OnHNgOLBhK4PmE6452+W75St63AD7dlbXC41rHfaeJdjy1vfUO9G9pv+POZZYO4W7 8T+HFqqnuC0Aua3MwRvDO3YNy8pYXbIOytrwhm5uvMxkVClDcPAszpNMwk9QbjHSL3fB +8JA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685033295; x=1687625295; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2DlfcKG/pJUr8Qa+/DBUqov9JmpCu0jzQoJykH4Lc90=; b=D82q/JWYlKoZQ3GLgFFnrbmLQh/wcftZufTTSBG5Y89qMy91FUXgBjOgiPTSw6cG08 pYMgHJT+lDw98yENxDJPigszwKx5aCM4JWUrU+oe8UqTbfRx5VeW7941emQk9I/V5DsI ugatjxEmCetNBn/j0UTAWs0LdSP4i0XWbiOVQdWUPTMRwCOnnzpoSmSMYg/VExMS9NSe /XQwd3BHLhYwuh6I/l3RAveYZFGTpiqR8MbNwonIQHdO1mvsV6iZhs679Z4J5fvfHBVE mGCBdz6RF5ziE/qNvD+ir2YlEwltz/JDzOPTyFTL+Y/sjEulKOE2YgLq1yAmw1U9Uknj w45g== X-Gm-Message-State: AC+VfDxMrTidPGy/KTzfzRkepnmi7nCGbrFC90q/LdsjzHHTCKcXq8aS U6G4R9WktaQ59fhnetJwy44igw== X-Google-Smtp-Source: ACHHUZ5Emjd7lRIE2nACQKxdFOrtsP1PbP6Rub15OxGC3vvkMP8EEVCxCGATHCO06buEaWOKra+wUQ== X-Received: by 2002:a9d:66ce:0:b0:6b0:c54c:8247 with SMTP id t14-20020a9d66ce000000b006b0c54c8247mr92809otm.24.1685033295229; Thu, 25 May 2023 09:48:15 -0700 (PDT) Received: from sunil-laptop.dc1.ventanamicro.com ([106.51.186.3]) by smtp.gmail.com with ESMTPSA id l18-20020a9d7a92000000b006af886703f2sm803905otn.37.2023.05.25.09.48.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 May 2023 09:48:15 -0700 (PDT) From: Sunil V L To: qemu-riscv@nongnu.org Cc: qemu-devel@nongnu.org, Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Andrea Bolognani , Sunil V L , Heinrich Schuchardt Subject: [PATCH v4 1/3] hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none" Date: Thu, 25 May 2023 22:18:01 +0530 Message-Id: <20230525164803.17992-2-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230525164803.17992-1-sunilvl@ventanamicro.com> References: <20230525164803.17992-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::332; envelope-from=sunilvl@ventanamicro.com; helo=mail-ot1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Currently, virt machine supports two pflash instances each with 32MB size. However, the first pflash is always assumed to contain M-mode firmware and reset vector is set to this if enabled. Hence, for S-mode payloads like EDK2, only one pflash instance is available for use. This means both code and NV variables of EDK2 will need to use the same pflash. The OS distros keep the EDK2 FW code as readonly. When non-volatile variables also need to share the same pflash, it is not possible to keep it as readonly since variables need write access. To resolve this issue, the code and NV variables need to be separated. But in that case we need an extra flash. Hence, modify the convention such that pflash0 will contain the M-mode FW only when "-bios none" option is used. Otherwise, pflash0 will contain the S-mode payload FW. This enables both pflash instances available for EDK2 use. Example usage: 1) pflash0 containing M-mode FW qemu-system-riscv64 -bios none -pflash -machine virt or qemu-system-riscv64 -bios none \ -drive file=,if=pflash,format=raw,unit=0 -machine virt 2) pflash0 containing S-mode payload like EDK2 qemu-system-riscv64 -pflash -pflash -machine virt or qemu-system-riscv64 -bios \ -pflash \ -pflash \ -machine virt or qemu-system-riscv64 -bios \ -drive file=,if=pflash,format=raw,unit=0,readonly=on \ -drive file=,if=pflash,format=raw,unit=1 \ -machine virt Signed-off-by: Sunil V L Reported-by: Heinrich Schuchardt Tested-by: Andrea Bolognani --- hw/riscv/virt.c | 51 ++++++++++++++++++------------------------------- 1 file changed, 19 insertions(+), 32 deletions(-) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 4e3efbee16..1187a60d6e 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1245,7 +1245,7 @@ static void virt_machine_done(Notifier *notifier, void *data) target_ulong firmware_end_addr, kernel_start_addr; const char *firmware_name = riscv_default_firmware_name(&s->soc[0]); uint32_t fdt_load_addr; - uint64_t kernel_entry; + uint64_t kernel_entry = 0; /* * Only direct boot kernel is currently supported for KVM VM, @@ -1266,42 +1266,29 @@ static void virt_machine_done(Notifier *notifier, void *data) firmware_end_addr = riscv_find_and_load_firmware(machine, firmware_name, start_addr, NULL); - if (drive_get(IF_PFLASH, 0, 1)) { - /* - * S-mode FW like EDK2 will be kept in second plash (unit 1). - * When both kernel, initrd and pflash options are provided in the - * command line, the kernel and initrd will be copied to the fw_cfg - * table and opensbi will jump to the flash address which is the - * entry point of S-mode FW. It is the job of the S-mode FW to load - * the kernel and initrd using fw_cfg table. - * - * If only pflash is given but not -kernel, then it is the job of - * of the S-mode firmware to locate and load the kernel. - * In either case, the next_addr for opensbi will be the flash address. - */ - riscv_setup_firmware_boot(machine); - kernel_entry = virt_memmap[VIRT_FLASH].base + - virt_memmap[VIRT_FLASH].size / 2; - } else if (machine->kernel_filename) { + if (drive_get(IF_PFLASH, 0, 0)) { + if (machine->firmware && !strcmp(machine->firmware, "none")) { + /* + * Pflash was supplied but bios is none, let's overwrite the + * address we jump to after reset to the base of the flash. + */ + start_addr = virt_memmap[VIRT_FLASH].base; + } else { + /* + * Pflash was supplied but bios is not none. In this case, + * base of the flash would contain S-mode payload. + */ + riscv_setup_firmware_boot(machine); + kernel_entry = virt_memmap[VIRT_FLASH].base; + } + } + + if (machine->kernel_filename && !kernel_entry) { kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc[0], firmware_end_addr); kernel_entry = riscv_load_kernel(machine, &s->soc[0], kernel_start_addr, true, NULL); - } else { - /* - * If dynamic firmware is used, it doesn't know where is the next mode - * if kernel argument is not set. - */ - kernel_entry = 0; - } - - if (drive_get(IF_PFLASH, 0, 0)) { - /* - * Pflash was supplied, let's overwrite the address we jump to after - * reset to the base of the flash. - */ - start_addr = virt_memmap[VIRT_FLASH].base; } fdt_load_addr = riscv_compute_fdt_addr(memmap[VIRT_DRAM].base,