| Message ID | 20230530185949.410208-1-richard.henderson@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 5/30/23 11:59, Richard Henderson wrote: > The following changes since commit 7fe6cb68117ac856e03c93d18aca09de015392b0: > > Merge tag 'pull-target-arm-20230530-1' ofhttps://git.linaro.org/people/pmaydell/qemu-arm into staging (2023-05-30 08:02:05 -0700) > > are available in the Git repository at: > > https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230530 > > for you to fetch changes up to 276d77de503e8f5f5cbd3f7d94302ca12d1d982e: > > tests/decode: Add tests for various named-field cases (2023-05-30 10:55:39 -0700) > > ---------------------------------------------------------------- > Improvements to 128-bit atomics: > - Separate __int128_t type and arithmetic detection > - Support 128-bit load/store in backend for i386, aarch64, ppc64, s390x > - Accelerate atomics via host/include/ > Decodetree: > - Add named field syntax > - Move tests to meson Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/8.1 as appropriate. r~
On 31/05/2023 03.08, Richard Henderson wrote: > On 5/30/23 11:59, Richard Henderson wrote: >> The following changes since commit 7fe6cb68117ac856e03c93d18aca09de015392b0: >> >> Merge tag 'pull-target-arm-20230530-1' >> ofhttps://git.linaro.org/people/pmaydell/qemu-arm into staging >> (2023-05-30 08:02:05 -0700) >> >> are available in the Git repository at: >> >> https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230530 >> >> for you to fetch changes up to 276d77de503e8f5f5cbd3f7d94302ca12d1d982e: >> >> tests/decode: Add tests for various named-field cases (2023-05-30 >> 10:55:39 -0700) >> >> ---------------------------------------------------------------- >> Improvements to 128-bit atomics: >> - Separate __int128_t type and arithmetic detection >> - Support 128-bit load/store in backend for i386, aarch64, ppc64, s390x >> - Accelerate atomics via host/include/ >> Decodetree: >> - Add named field syntax >> - Move tests to meson > > Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/8.1 as > appropriate. Too bad that we've run out of CI minutes for the Windows jobs ... FYI, this is causing now failure in the msys2 jobs: https://gitlab.com/thuth/qemu/-/jobs/4385862382#L4821 https://gitlab.com/thuth/qemu/-/jobs/4385862378#L4632 Thomas
On 5/31/23 11:07, Richard Henderson wrote: > On 5/31/23 09:12, Thomas Huth wrote: >> On 31/05/2023 03.08, Richard Henderson wrote: >>> On 5/30/23 11:59, Richard Henderson wrote: >>>> The following changes since commit 7fe6cb68117ac856e03c93d18aca09de015392b0: >>>> >>>> Merge tag 'pull-target-arm-20230530-1' >>>> ofhttps://git.linaro.org/people/pmaydell/qemu-arm into staging (2023-05-30 08:02:05 >>>> -0700) >>>> >>>> are available in the Git repository at: >>>> >>>> https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230530 >>>> >>>> for you to fetch changes up to 276d77de503e8f5f5cbd3f7d94302ca12d1d982e: >>>> >>>> tests/decode: Add tests for various named-field cases (2023-05-30 10:55:39 -0700) >>>> >>>> ---------------------------------------------------------------- >>>> Improvements to 128-bit atomics: >>>> - Separate __int128_t type and arithmetic detection >>>> - Support 128-bit load/store in backend for i386, aarch64, ppc64, s390x >>>> - Accelerate atomics via host/include/ >>>> Decodetree: >>>> - Add named field syntax >>>> - Move tests to meson >>> >>> Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/8.1 as appropriate. >> >> Too bad that we've run out of CI minutes for the Windows jobs ... FYI, this is causing >> now failure in the msys2 jobs: >> >> https://gitlab.com/thuth/qemu/-/jobs/4385862382#L4821 >> https://gitlab.com/thuth/qemu/-/jobs/4385862378#L4632 > > Grr. It doesn't even say what failed, just wrong exit code. > I wonder if the -o /dev/null is getting in the way... Whee. From meson-logs/testlog.txt: FileNotFoundError: [Errno 2] No such file or directory: '/dev/null' r~
On 31/05/2023 17:12, Thomas Huth wrote: > On 31/05/2023 03.08, Richard Henderson wrote: >> On 5/30/23 11:59, Richard Henderson wrote: >>> The following changes since commit 7fe6cb68117ac856e03c93d18aca09de015392b0: >>> >>> Merge tag 'pull-target-arm-20230530-1' >>> ofhttps://git.linaro.org/people/pmaydell/qemu-arm into staging (2023-05-30 >>> 08:02:05 -0700) >>> >>> are available in the Git repository at: >>> >>> https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230530 >>> >>> for you to fetch changes up to 276d77de503e8f5f5cbd3f7d94302ca12d1d982e: >>> >>> tests/decode: Add tests for various named-field cases (2023-05-30 10:55:39 -0700) >>> >>> ---------------------------------------------------------------- >>> Improvements to 128-bit atomics: >>> - Separate __int128_t type and arithmetic detection >>> - Support 128-bit load/store in backend for i386, aarch64, ppc64, s390x >>> - Accelerate atomics via host/include/ >>> Decodetree: >>> - Add named field syntax >>> - Move tests to meson >> >> Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/8.1 as appropriate. > > Too bad that we've run out of CI minutes for the Windows jobs ... FYI, this is > causing now failure in the msys2 jobs: > > https://gitlab.com/thuth/qemu/-/jobs/4385862382#L4821 > https://gitlab.com/thuth/qemu/-/jobs/4385862378#L4632 Given that we now run Kubernetes on Azure, should we consider setting up a Windows Kubernetes node for the msys2 jobs? When I last looked at this for a client ~2 years ago it was still experimental, but in theory it should be possible to set up a Windows node as part of the cluster and install the Windows GitLab runner in a container on it... ATB, Mark.
The following changes since commit 7fe6cb68117ac856e03c93d18aca09de015392b0: Merge tag 'pull-target-arm-20230530-1' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2023-05-30 08:02:05 -0700) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230530 for you to fetch changes up to 276d77de503e8f5f5cbd3f7d94302ca12d1d982e: tests/decode: Add tests for various named-field cases (2023-05-30 10:55:39 -0700) ---------------------------------------------------------------- Improvements to 128-bit atomics: - Separate __int128_t type and arithmetic detection - Support 128-bit load/store in backend for i386, aarch64, ppc64, s390x - Accelerate atomics via host/include/ Decodetree: - Add named field syntax - Move tests to meson ---------------------------------------------------------------- Peter Maydell (5): docs: Document decodetree named field syntax scripts/decodetree: Pass lvalue-formatter function to str_extract() scripts/decodetree: Implement a topological sort scripts/decodetree: Implement named field support tests/decode: Add tests for various named-field cases Richard Henderson (22): tcg: Fix register move type in tcg_out_ld_helper_ret accel/tcg: Fix check for page writeability in load_atomic16_or_exit meson: Split test for __int128_t type from __int128_t arithmetic qemu/atomic128: Add x86_64 atomic128-ldst.h tcg/i386: Support 128-bit load/store tcg/aarch64: Rename temporaries tcg/aarch64: Reserve TCG_REG_TMP1, TCG_REG_TMP2 tcg/aarch64: Simplify constraints on qemu_ld/st tcg/aarch64: Support 128-bit load/store tcg/ppc: Support 128-bit load/store tcg/s390x: Support 128-bit load/store accel/tcg: Extract load_atom_extract_al16_or_al8 to host header accel/tcg: Extract store_atom_insert_al16 to host header accel/tcg: Add x86_64 load_atom_extract_al16_or_al8 accel/tcg: Add aarch64 lse2 load_atom_extract_al16_or_al8 accel/tcg: Add aarch64 store_atom_insert_al16 tcg: Remove TCG_TARGET_TLB_DISPLACEMENT_BITS decodetree: Add --test-for-error decodetree: Fix recursion in prop_format and build_tree decodetree: Diagnose empty pattern group decodetree: Do not remove output_file from /dev tests/decode: Convert tests to meson docs/devel/decodetree.rst | 33 ++- meson.build | 15 +- host/include/aarch64/host/load-extract-al16-al8.h | 40 ++++ host/include/aarch64/host/store-insert-al16.h | 47 ++++ host/include/generic/host/load-extract-al16-al8.h | 45 ++++ host/include/generic/host/store-insert-al16.h | 50 ++++ host/include/x86_64/host/atomic128-ldst.h | 68 ++++++ host/include/x86_64/host/load-extract-al16-al8.h | 50 ++++ include/qemu/int128.h | 4 +- tcg/aarch64/tcg-target-con-set.h | 4 +- tcg/aarch64/tcg-target-con-str.h | 1 - tcg/aarch64/tcg-target.h | 12 +- tcg/arm/tcg-target.h | 1 - tcg/i386/tcg-target.h | 5 +- tcg/mips/tcg-target.h | 1 - tcg/ppc/tcg-target-con-set.h | 2 + tcg/ppc/tcg-target-con-str.h | 1 + tcg/ppc/tcg-target.h | 4 +- tcg/riscv/tcg-target.h | 1 - tcg/s390x/tcg-target-con-set.h | 2 + tcg/s390x/tcg-target.h | 3 +- tcg/sparc64/tcg-target.h | 1 - tcg/tci/tcg-target.h | 1 - tests/decode/err_field10.decode | 7 + tests/decode/err_field7.decode | 7 + tests/decode/err_field8.decode | 8 + tests/decode/err_field9.decode | 14 ++ tests/decode/succ_named_field.decode | 19 ++ tcg/tcg.c | 4 +- accel/tcg/ldst_atomicity.c.inc | 80 +------ tcg/aarch64/tcg-target.c.inc | 243 +++++++++++++++----- tcg/i386/tcg-target.c.inc | 191 +++++++++++++++- tcg/ppc/tcg-target.c.inc | 108 ++++++++- tcg/s390x/tcg-target.c.inc | 107 ++++++++- scripts/decodetree.py | 265 ++++++++++++++++++++-- tests/decode/check.sh | 24 -- tests/decode/meson.build | 64 ++++++ tests/meson.build | 5 +- 38 files changed, 1312 insertions(+), 225 deletions(-) create mode 100644 host/include/aarch64/host/load-extract-al16-al8.h create mode 100644 host/include/aarch64/host/store-insert-al16.h create mode 100644 host/include/generic/host/load-extract-al16-al8.h create mode 100644 host/include/generic/host/store-insert-al16.h create mode 100644 host/include/x86_64/host/atomic128-ldst.h create mode 100644 host/include/x86_64/host/load-extract-al16-al8.h create mode 100644 tests/decode/err_field10.decode create mode 100644 tests/decode/err_field7.decode create mode 100644 tests/decode/err_field8.decode create mode 100644 tests/decode/err_field9.decode create mode 100644 tests/decode/succ_named_field.decode delete mode 100755 tests/decode/check.sh create mode 100644 tests/decode/meson.build