| Message ID | 20230530194623.272652-9-dbarboza@ventanamicro.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/riscv, KVM: fixes and enhancements | expand |
On Tue, May 30, 2023 at 04:46:15PM -0300, Daniel Henrique Barboza wrote: > After changing user validation for mvendorid/marchid/mimpid to guarantee > that the value is validated on user input time, coupled with the work in > fetching KVM default values for them by using a scratch CPU, we're > certain that the values in cpu->cfg.(mvendorid|marchid|mimpid) are > already good to be written back to KVM. > > There's no need to write the values back for 'host' type CPUs since the > values can't be changed, so let's do that just for generic CPUs. > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > --- > target/riscv/kvm.c | 31 +++++++++++++++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c > index cd2974c663..602727cdfd 100644 > --- a/target/riscv/kvm.c > +++ b/target/riscv/kvm.c > @@ -495,6 +495,33 @@ void kvm_arch_init_irq_routing(KVMState *s) > { > } > > +static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, CPUState *cs) > +{ > + CPURISCVState *env = &cpu->env; > + uint64_t id; > + int ret; > + > + id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, > + KVM_REG_RISCV_CONFIG_REG(mvendorid)); > + ret = kvm_set_one_reg(cs, id, &cpu->cfg.mvendorid); > + if (ret != 0) { > + return ret; > + } > + > + id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, > + KVM_REG_RISCV_CONFIG_REG(marchid)); > + ret = kvm_set_one_reg(cs, id, &cpu->cfg.marchid); > + if (ret != 0) { > + return ret; > + } > + > + id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, > + KVM_REG_RISCV_CONFIG_REG(mimpid)); > + ret = kvm_set_one_reg(cs, id, &cpu->cfg.mimpid); > + > + return ret; > +} > + > int kvm_arch_init_vcpu(CPUState *cs) > { > int ret = 0; > @@ -513,6 +540,10 @@ int kvm_arch_init_vcpu(CPUState *cs) > } > env->misa_ext = isa; > > + if (!object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST)) { > + ret = kvm_vcpu_set_machine_ids(cpu, cs); > + } > + > return ret; > } > > -- > 2.40.1 > > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index cd2974c663..602727cdfd 100644 --- a/target/riscv/kvm.c +++ b/target/riscv/kvm.c @@ -495,6 +495,33 @@ void kvm_arch_init_irq_routing(KVMState *s) { } +static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, CPUState *cs) +{ + CPURISCVState *env = &cpu->env; + uint64_t id; + int ret; + + id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, + KVM_REG_RISCV_CONFIG_REG(mvendorid)); + ret = kvm_set_one_reg(cs, id, &cpu->cfg.mvendorid); + if (ret != 0) { + return ret; + } + + id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, + KVM_REG_RISCV_CONFIG_REG(marchid)); + ret = kvm_set_one_reg(cs, id, &cpu->cfg.marchid); + if (ret != 0) { + return ret; + } + + id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, + KVM_REG_RISCV_CONFIG_REG(mimpid)); + ret = kvm_set_one_reg(cs, id, &cpu->cfg.mimpid); + + return ret; +} + int kvm_arch_init_vcpu(CPUState *cs) { int ret = 0; @@ -513,6 +540,10 @@ int kvm_arch_init_vcpu(CPUState *cs) } env->misa_ext = isa; + if (!object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST)) { + ret = kvm_vcpu_set_machine_ids(cpu, cs); + } + return ret; }
After changing user validation for mvendorid/marchid/mimpid to guarantee that the value is validated on user input time, coupled with the work in fetching KVM default values for them by using a scratch CPU, we're certain that the values in cpu->cfg.(mvendorid|marchid|mimpid) are already good to be written back to KVM. There's no need to write the values back for 'host' type CPUs since the values can't be changed, so let's do that just for generic CPUs. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> --- target/riscv/kvm.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+)