| Message ID | 20230630122551.21766-5-anjo@rev.ng (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Collapse CPUNegativeOffsetState into CPUState | expand |
On 6/30/23 14:25, Anton Johansson wrote: > For reasons related to code-generation quality, the offset of > CPUTLBDescFast and IcountDecr from CPUArchState needs to fit within > 11 bits of displacement (arm[32|64] and riscv addressing modes). > > This commit introduces a new constant to store the maximum allowed > negative offset, so it can be statically asserted to hold later on. > > Signed-off-by: Anton Johansson <anjo@rev.ng> > --- > include/hw/core/cpu.h | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h > index c226d7263c..0377f74d48 100644 > --- a/include/hw/core/cpu.h > +++ b/include/hw/core/cpu.h > @@ -259,6 +259,17 @@ struct qemu_work_item; > > #define CPU_UNSET_NUMA_NODE_ID -1 > > +/* > + * For reasons related to code-generation quality the fast path > + * CPUTLBDescFast array and IcountDecr fields need to be located within a > + * small negative offset of CPUArchState. This requirement comes from > + * host-specific addressing modes of arm[32|64] and riscv which uses 12- > + * and 11 bits of displacement respectively. > + */ > +#define CPU_MIN_DISPLACEMENT_BITS 11 > +#define CPU_MAX_NEGATIVE_ENV_OFFSET \ > + (-(1 << CPU_MIN_DISPLACEMENT_BITS)) You'd want 6 bits, for AArch64 LDP (7-bit signed immediate). r~
On 6/30/23 16:19, Richard Henderson wrote: > On 6/30/23 14:25, Anton Johansson wrote: >> For reasons related to code-generation quality, the offset of >> CPUTLBDescFast and IcountDecr from CPUArchState needs to fit within >> 11 bits of displacement (arm[32|64] and riscv addressing modes). >> >> This commit introduces a new constant to store the maximum allowed >> negative offset, so it can be statically asserted to hold later on. >> >> Signed-off-by: Anton Johansson <anjo@rev.ng> >> --- >> include/hw/core/cpu.h | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h >> index c226d7263c..0377f74d48 100644 >> --- a/include/hw/core/cpu.h >> +++ b/include/hw/core/cpu.h >> @@ -259,6 +259,17 @@ struct qemu_work_item; >> #define CPU_UNSET_NUMA_NODE_ID -1 >> +/* >> + * For reasons related to code-generation quality the fast path >> + * CPUTLBDescFast array and IcountDecr fields need to be located >> within a >> + * small negative offset of CPUArchState. This requirement comes from >> + * host-specific addressing modes of arm[32|64] and riscv which uses >> 12- >> + * and 11 bits of displacement respectively. >> + */ >> +#define CPU_MIN_DISPLACEMENT_BITS 11 >> +#define CPU_MAX_NEGATIVE_ENV_OFFSET \ >> + (-(1 << CPU_MIN_DISPLACEMENT_BITS)) > > You'd want 6 bits, for AArch64 LDP (7-bit signed immediate). Ah right, but it's scaled so it would be -512 for AArch64 and -256 for arm32, that would also agree with the smallest MIN_TLB_MASK_TABLE_OFS in the backends.
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index c226d7263c..0377f74d48 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -259,6 +259,17 @@ struct qemu_work_item; #define CPU_UNSET_NUMA_NODE_ID -1 +/* + * For reasons related to code-generation quality the fast path + * CPUTLBDescFast array and IcountDecr fields need to be located within a + * small negative offset of CPUArchState. This requirement comes from + * host-specific addressing modes of arm[32|64] and riscv which uses 12- + * and 11 bits of displacement respectively. + */ +#define CPU_MIN_DISPLACEMENT_BITS 11 +#define CPU_MAX_NEGATIVE_ENV_OFFSET \ + (-(1 << CPU_MIN_DISPLACEMENT_BITS)) + /** * CPUState: * @cpu_index: CPU index (informative).
For reasons related to code-generation quality, the offset of CPUTLBDescFast and IcountDecr from CPUArchState needs to fit within 11 bits of displacement (arm[32|64] and riscv addressing modes). This commit introduces a new constant to store the maximum allowed negative offset, so it can be statically asserted to hold later on. Signed-off-by: Anton Johansson <anjo@rev.ng> --- include/hw/core/cpu.h | 11 +++++++++++ 1 file changed, 11 insertions(+)