| Message ID | 20230630122551.21766-9-anjo@rev.ng (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Collapse CPUNegativeOffsetState into CPUState | expand |
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index fcd20bfd3a..2e4b7cfc53 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -263,7 +263,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUAlphaState env; /* This alarm doesn't exist in real hardware; we wish it did. */ diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 4d6c0f95d5..7bced90c34 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -856,7 +856,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUARMState env; /* Coprocessor information */ diff --git a/target/avr/cpu.h b/target/avr/cpu.h index 7225174668..4ce22d8e4f 100644 --- a/target/avr/cpu.h +++ b/target/avr/cpu.h @@ -148,7 +148,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUAVRState env; }; diff --git a/target/cris/cpu.h b/target/cris/cpu.h index 8e37c6e50d..676b8e93ca 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -178,7 +178,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUCRISState env; }; diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index daef5c3f00..b2de6e1d5d 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -141,7 +141,6 @@ struct ArchCPU { /*< private >*/ CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUHexagonState env; bool lldb_compat; diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 7373177b55..b36de8f431 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -219,7 +219,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUHPPAState env; QEMUTimer *alarm_timer; }; diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 2c9b0d2ebc..3bc215dc5d 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1889,7 +1889,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUX86State env; VMChangeStateEntry *vmsentry; diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index ed04027af1..87529c93bf 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -367,7 +367,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPULoongArchState env; QEMUTimer timer; diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index cf70282717..20afb0c94d 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -168,7 +168,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUM68KState env; }; diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index a7b040abd4..baf7d979f6 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -352,7 +352,6 @@ struct ArchCPU { bool ns_axi_dc; bool ns_axi_ic; - CPUNegativeOffsetState neg; CPUMBState env; MicroBlazeCPUConfig cfg; }; diff --git a/target/mips/cpu.h b/target/mips/cpu.h index a3bc646976..d118170a62 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1177,9 +1177,8 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - Clock *clock; - CPUNegativeOffsetState neg; CPUMIPSState env; + Clock *clock; }; diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 477a3161fd..70b6377a4f 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -218,7 +218,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUNios2State env; bool diverr_present; diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 92c38f54c2..e823858e40 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -305,7 +305,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUOpenRISCState env; }; diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index af12c93ebc..c480a1b37f 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1311,7 +1311,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUPPCState env; int vcpu_id; diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 7adb8706ac..4b9e0f818e 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -383,7 +383,6 @@ struct ArchCPU { /* < private > */ CPUState parent_obj; /* < public > */ - CPUNegativeOffsetState neg; CPURISCVState env; char *dyn_csr_xml; diff --git a/target/rx/cpu.h b/target/rx/cpu.h index 7f03ffcfed..f66754eb8a 100644 --- a/target/rx/cpu.h +++ b/target/rx/cpu.h @@ -111,7 +111,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPURXState env; }; diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index eb5b65b7d3..7592ad53a8 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -168,7 +168,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUS390XState env; S390CPUModel *model; /* needed for live migration */ diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 1399d3840f..f75a235973 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -208,7 +208,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUSH4State env; }; diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 95d2d0da71..9385228a96 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -561,7 +561,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUSPARCState env; }; diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index a50b91cc36..7a48077485 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -192,7 +192,6 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - CPUNegativeOffsetState neg; CPUTriCoreState env; }; diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 87fe992ba6..c6bbef1e5d 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -560,9 +560,8 @@ struct ArchCPU { CPUState parent_obj; /*< public >*/ - Clock *clock; - CPUNegativeOffsetState neg; CPUXtensaState env; + Clock *clock; };
All fields in CPUNegativeOffsetState have been moved to CPUState. Signed-off-by: Anton Johansson <anjo@rev.ng> --- target/alpha/cpu.h | 1 - target/arm/cpu.h | 1 - target/avr/cpu.h | 1 - target/cris/cpu.h | 1 - target/hexagon/cpu.h | 1 - target/hppa/cpu.h | 1 - target/i386/cpu.h | 1 - target/loongarch/cpu.h | 1 - target/m68k/cpu.h | 1 - target/microblaze/cpu.h | 1 - target/mips/cpu.h | 3 +-- target/nios2/cpu.h | 1 - target/openrisc/cpu.h | 1 - target/ppc/cpu.h | 1 - target/riscv/cpu.h | 1 - target/rx/cpu.h | 1 - target/s390x/cpu.h | 1 - target/sh4/cpu.h | 1 - target/sparc/cpu.h | 1 - target/tricore/cpu.h | 1 - target/xtensa/cpu.h | 3 +-- 21 files changed, 2 insertions(+), 23 deletions(-)