diff mbox series

[2/2] tests/avocado: riscv: Enable 32-bit Spike OpenSBI boot testing

Message ID 20230630160717.843044-2-bmeng@tinylab.org (mailing list archive)
State New, archived
Headers show
Series [1/2] roms/opensbi: Upgrade from v1.2 to v1.3 | expand

Commit Message

Bin Meng June 30, 2023, 4:07 p.m. UTC
The 32-bit Spike boot issue has been fixed in the OpenSBI v1.3.
Let's enable the 32-bit Spike OpenSBI boot testing.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
---

 tests/avocado/riscv_opensbi.py | 2 --
 1 file changed, 2 deletions(-)

Comments

Daniel Henrique Barboza July 1, 2023, 12:06 p.m. UTC | #1
On 6/30/23 13:07, Bin Meng wrote:
> The 32-bit Spike boot issue has been fixed in the OpenSBI v1.3.
> Let's enable the 32-bit Spike OpenSBI boot testing.
> 
> Signed-off-by: Bin Meng <bmeng@tinylab.org>
> ---


(03/17) tests/avocado/riscv_opensbi.py:RiscvOpenSBI.test_riscv32_spike: PASS (0.10 s)

Nice!

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>



> 
>   tests/avocado/riscv_opensbi.py | 2 --
>   1 file changed, 2 deletions(-)
> 
> diff --git a/tests/avocado/riscv_opensbi.py b/tests/avocado/riscv_opensbi.py
> index e02f0d404a..bfff9cc3c3 100644
> --- a/tests/avocado/riscv_opensbi.py
> +++ b/tests/avocado/riscv_opensbi.py
> @@ -6,7 +6,6 @@
>   # later.  See the COPYING file in the top-level directory.
>   
>   from avocado_qemu import QemuSystemTest
> -from avocado import skip
>   from avocado_qemu import wait_for_console_pattern
>   
>   class RiscvOpenSBI(QemuSystemTest):
> @@ -21,7 +20,6 @@ def boot_opensbi(self):
>           wait_for_console_pattern(self, 'Platform Name')
>           wait_for_console_pattern(self, 'Boot HART MEDELEG')
>   
> -    @skip("requires OpenSBI fix to work")
>       def test_riscv32_spike(self):
>           """
>           :avocado: tags=arch:riscv32
Alistair Francis July 3, 2023, 12:52 a.m. UTC | #2
On Sat, Jul 1, 2023 at 2:08 AM Bin Meng <bmeng@tinylab.org> wrote:
>
> The 32-bit Spike boot issue has been fixed in the OpenSBI v1.3.
> Let's enable the 32-bit Spike OpenSBI boot testing.
>
> Signed-off-by: Bin Meng <bmeng@tinylab.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>
>  tests/avocado/riscv_opensbi.py | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/tests/avocado/riscv_opensbi.py b/tests/avocado/riscv_opensbi.py
> index e02f0d404a..bfff9cc3c3 100644
> --- a/tests/avocado/riscv_opensbi.py
> +++ b/tests/avocado/riscv_opensbi.py
> @@ -6,7 +6,6 @@
>  # later.  See the COPYING file in the top-level directory.
>
>  from avocado_qemu import QemuSystemTest
> -from avocado import skip
>  from avocado_qemu import wait_for_console_pattern
>
>  class RiscvOpenSBI(QemuSystemTest):
> @@ -21,7 +20,6 @@ def boot_opensbi(self):
>          wait_for_console_pattern(self, 'Platform Name')
>          wait_for_console_pattern(self, 'Boot HART MEDELEG')
>
> -    @skip("requires OpenSBI fix to work")
>      def test_riscv32_spike(self):
>          """
>          :avocado: tags=arch:riscv32
> --
> 2.34.1
>
>
Alistair Francis July 3, 2023, 12:56 a.m. UTC | #3
On Sat, Jul 1, 2023 at 2:08 AM Bin Meng <bmeng@tinylab.org> wrote:
>
> The 32-bit Spike boot issue has been fixed in the OpenSBI v1.3.
> Let's enable the 32-bit Spike OpenSBI boot testing.
>
> Signed-off-by: Bin Meng <bmeng@tinylab.org>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
>
>  tests/avocado/riscv_opensbi.py | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/tests/avocado/riscv_opensbi.py b/tests/avocado/riscv_opensbi.py
> index e02f0d404a..bfff9cc3c3 100644
> --- a/tests/avocado/riscv_opensbi.py
> +++ b/tests/avocado/riscv_opensbi.py
> @@ -6,7 +6,6 @@
>  # later.  See the COPYING file in the top-level directory.
>
>  from avocado_qemu import QemuSystemTest
> -from avocado import skip
>  from avocado_qemu import wait_for_console_pattern
>
>  class RiscvOpenSBI(QemuSystemTest):
> @@ -21,7 +20,6 @@ def boot_opensbi(self):
>          wait_for_console_pattern(self, 'Platform Name')
>          wait_for_console_pattern(self, 'Boot HART MEDELEG')
>
> -    @skip("requires OpenSBI fix to work")
>      def test_riscv32_spike(self):
>          """
>          :avocado: tags=arch:riscv32
> --
> 2.34.1
>
>
diff mbox series

Patch

diff --git a/tests/avocado/riscv_opensbi.py b/tests/avocado/riscv_opensbi.py
index e02f0d404a..bfff9cc3c3 100644
--- a/tests/avocado/riscv_opensbi.py
+++ b/tests/avocado/riscv_opensbi.py
@@ -6,7 +6,6 @@ 
 # later.  See the COPYING file in the top-level directory.
 
 from avocado_qemu import QemuSystemTest
-from avocado import skip
 from avocado_qemu import wait_for_console_pattern
 
 class RiscvOpenSBI(QemuSystemTest):
@@ -21,7 +20,6 @@  def boot_opensbi(self):
         wait_for_console_pattern(self, 'Platform Name')
         wait_for_console_pattern(self, 'Boot HART MEDELEG')
 
-    @skip("requires OpenSBI fix to work")
     def test_riscv32_spike(self):
         """
         :avocado: tags=arch:riscv32