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[2403:580b:97e8:0:321:6fb2:58f1:a1b1]) by smtp.gmail.com with ESMTPSA id i126-20020a639d84000000b0055b44a901absm181559pgd.70.2023.07.10.05.33.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Jul 2023 05:33:15 -0700 (PDT) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Bin Meng , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 16/54] tests/avocado: riscv: Enable 32-bit Spike OpenSBI boot testing Date: Mon, 10 Jul 2023 22:31:27 +1000 Message-Id: <20230710123205.2441106-17-alistair.francis@wdc.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230710123205.2441106-1-alistair.francis@wdc.com> References: <20230710123205.2441106-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::336; envelope-from=alistair23@gmail.com; helo=mail-ot1-x336.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bin Meng The 32-bit Spike boot issue has been fixed in the OpenSBI v1.3. Let's enable the 32-bit Spike OpenSBI boot testing. Signed-off-by: Bin Meng Message-Id: <20230630160717.843044-2-bmeng@tinylab.org> Reviewed-by: Daniel Henrique Barboza Reviewed-by: Alistair Francis Signed-off-by: Alistair Francis --- tests/avocado/riscv_opensbi.py | 2 -- 1 file changed, 2 deletions(-) diff --git a/tests/avocado/riscv_opensbi.py b/tests/avocado/riscv_opensbi.py index e02f0d404a..bfff9cc3c3 100644 --- a/tests/avocado/riscv_opensbi.py +++ b/tests/avocado/riscv_opensbi.py @@ -6,7 +6,6 @@ # later. See the COPYING file in the top-level directory. from avocado_qemu import QemuSystemTest -from avocado import skip from avocado_qemu import wait_for_console_pattern class RiscvOpenSBI(QemuSystemTest): @@ -21,7 +20,6 @@ def boot_opensbi(self): wait_for_console_pattern(self, 'Platform Name') wait_for_console_pattern(self, 'Boot HART MEDELEG') - @skip("requires OpenSBI fix to work") def test_riscv32_spike(self): """ :avocado: tags=arch:riscv32