@@ -276,6 +276,42 @@ static void kvm_cpu_set_multi_ext_cfg(Object *obj, Visitor *v,
kvm_cpu_cfg_set(cpu, multi_ext_cfg, value);
}
+static KVMCPUConfig kvm_cbom_blocksize = {
+ .name = "cbom_blocksize",
+ .offset = CPUCFG(cbom_blocksize),
+ .kvm_reg_id = KVM_REG_RISCV_CONFIG_REG(zicbom_block_size)
+};
+
+static KVMCPUConfig kvm_cboz_blocksize = {
+ .name = "cboz_blocksize",
+ .offset = CPUCFG(cboz_blocksize),
+ .kvm_reg_id = KVM_REG_RISCV_CONFIG_REG(zicboz_block_size)
+};
+
+static void kvm_cpu_set_cbomz_blksize(Object *obj, Visitor *v,
+ const char *name,
+ void *opaque, Error **errp)
+{
+ KVMCPUConfig *cbomz_cfg = opaque;
+ RISCVCPU *cpu = RISCV_CPU(obj);
+ uint16_t value, *host_val;
+
+ if (!visit_type_uint16(v, name, &value, errp)) {
+ return;
+ }
+
+ host_val = kvmconfig_get_cfg_addr(cpu, cbomz_cfg);
+
+ if (value != *host_val) {
+ error_report("Unable to set %s to a different value than "
+ "the host (%u)",
+ cbomz_cfg->name, *host_val);
+ exit(EXIT_FAILURE);
+ }
+
+ cbomz_cfg->user_set = true;
+}
+
static void kvm_riscv_update_cpu_cfg_isa_ext(RISCVCPU *cpu, CPUState *cs)
{
CPURISCVState *env = &cpu->env;
@@ -329,6 +365,14 @@ static void kvm_riscv_add_cpu_user_properties(Object *cpu_obj)
kvm_cpu_set_multi_ext_cfg,
NULL, multi_cfg);
}
+
+ object_property_add(cpu_obj, "cbom_blocksize", "uint16",
+ NULL, kvm_cpu_set_cbomz_blksize,
+ NULL, &kvm_cbom_blocksize);
+
+ object_property_add(cpu_obj, "cboz_blocksize", "uint16",
+ NULL, kvm_cpu_set_cbomz_blksize,
+ NULL, &kvm_cboz_blocksize);
}
static int kvm_riscv_get_regs_core(CPUState *cs)
@@ -644,6 +688,24 @@ static void kvm_riscv_init_misa_ext_mask(RISCVCPU *cpu,
env->misa_ext = env->misa_ext_mask;
}
+static void kvm_riscv_read_cbomz_blksize(RISCVCPU *cpu, KVMScratchCPU *kvmcpu,
+ KVMCPUConfig *cbomz_cfg)
+{
+ CPURISCVState *env = &cpu->env;
+ struct kvm_one_reg reg;
+ int ret;
+
+ reg.id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
+ cbomz_cfg->kvm_reg_id);
+ reg.addr = (uint64_t)kvmconfig_get_cfg_addr(cpu, cbomz_cfg);
+ ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®);
+ if (ret != 0) {
+ error_report("Unable to read KVM reg %s, error %d",
+ cbomz_cfg->name, ret);
+ exit(EXIT_FAILURE);
+ }
+}
+
static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu, KVMScratchCPU *kvmcpu)
{
CPURISCVState *env = &cpu->env;
@@ -675,6 +737,14 @@ static void kvm_riscv_init_multiext_cfg(RISCVCPU *cpu, KVMScratchCPU *kvmcpu)
kvm_cpu_cfg_set(cpu, multi_ext_cfg, val);
}
+
+ if (cpu->cfg.ext_icbom) {
+ kvm_riscv_read_cbomz_blksize(cpu, kvmcpu, &kvm_cbom_blocksize);
+ }
+
+ if (cpu->cfg.ext_icboz) {
+ kvm_riscv_read_cbomz_blksize(cpu, kvmcpu, &kvm_cboz_blocksize);
+ }
}
void kvm_riscv_init_user_properties(Object *cpu_obj)