| Message ID | 20230712163943.98994-3-sunilvl@ventanamicro.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | RISC-V: ACPI: Enable AIA and update RHC | expand |
On 7/12/23 13:39, Sunil V L wrote: > The PCI bus information is needed in RISCVVirtState so that other > files like virt-acpi-build.c can make use of it. Add new field in > RISCVVirtState so that ACPI code can use it. > > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> > --- > hw/riscv/virt.c | 6 ++++-- > include/hw/riscv/virt.h | 1 + > 2 files changed, 5 insertions(+), 2 deletions(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index d90286dc46..46d3341113 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -1073,7 +1073,8 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem, > hwaddr high_mmio_base, > hwaddr high_mmio_size, > hwaddr pio_base, > - DeviceState *irqchip) > + DeviceState *irqchip, > + RISCVVirtState *s) > { > DeviceState *dev; > MemoryRegion *ecam_alias, *ecam_reg; > @@ -1113,6 +1114,7 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem, > gpex_set_irq_num(GPEX_HOST(dev), i, PCIE_IRQ + i); > } > > + s->bus = PCI_HOST_BRIDGE(dev)->bus; > return dev; > } > > @@ -1502,7 +1504,7 @@ static void virt_machine_init(MachineState *machine) > virt_high_pcie_memmap.base, > virt_high_pcie_memmap.size, > memmap[VIRT_PCIE_PIO].base, > - pcie_irqchip); > + pcie_irqchip, s); I wonder whether we could use 's' inside gpex_pcie_init() to avoid passing all this memmap stuff to the function. It seems that most, if not all these values, can be derived from s->memmap[]. A work for another day perhaps. Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > > create_platform_bus(s, mmio_irqchip); > > diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h > index e5c474b26e..4ef1f660ab 100644 > --- a/include/hw/riscv/virt.h > +++ b/include/hw/riscv/virt.h > @@ -60,6 +60,7 @@ struct RISCVVirtState { > char *oem_table_id; > OnOffAuto acpi; > const MemMapEntry *memmap; > + PCIBus *bus; > }; > > enum {
On Thu, Jul 13, 2023 at 2:42 AM Sunil V L <sunilvl@ventanamicro.com> wrote: > > The PCI bus information is needed in RISCVVirtState so that other > files like virt-acpi-build.c can make use of it. Add new field in > RISCVVirtState so that ACPI code can use it. > > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/riscv/virt.c | 6 ++++-- > include/hw/riscv/virt.h | 1 + > 2 files changed, 5 insertions(+), 2 deletions(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index d90286dc46..46d3341113 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -1073,7 +1073,8 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem, > hwaddr high_mmio_base, > hwaddr high_mmio_size, > hwaddr pio_base, > - DeviceState *irqchip) > + DeviceState *irqchip, > + RISCVVirtState *s) > { > DeviceState *dev; > MemoryRegion *ecam_alias, *ecam_reg; > @@ -1113,6 +1114,7 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem, > gpex_set_irq_num(GPEX_HOST(dev), i, PCIE_IRQ + i); > } > > + s->bus = PCI_HOST_BRIDGE(dev)->bus; > return dev; > } > > @@ -1502,7 +1504,7 @@ static void virt_machine_init(MachineState *machine) > virt_high_pcie_memmap.base, > virt_high_pcie_memmap.size, > memmap[VIRT_PCIE_PIO].base, > - pcie_irqchip); > + pcie_irqchip, s); > > create_platform_bus(s, mmio_irqchip); > > diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h > index e5c474b26e..4ef1f660ab 100644 > --- a/include/hw/riscv/virt.h > +++ b/include/hw/riscv/virt.h > @@ -60,6 +60,7 @@ struct RISCVVirtState { > char *oem_table_id; > OnOffAuto acpi; > const MemMapEntry *memmap; > + PCIBus *bus; > }; > > enum { > -- > 2.39.2 > >
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index d90286dc46..46d3341113 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1073,7 +1073,8 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem, hwaddr high_mmio_base, hwaddr high_mmio_size, hwaddr pio_base, - DeviceState *irqchip) + DeviceState *irqchip, + RISCVVirtState *s) { DeviceState *dev; MemoryRegion *ecam_alias, *ecam_reg; @@ -1113,6 +1114,7 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion *sys_mem, gpex_set_irq_num(GPEX_HOST(dev), i, PCIE_IRQ + i); } + s->bus = PCI_HOST_BRIDGE(dev)->bus; return dev; } @@ -1502,7 +1504,7 @@ static void virt_machine_init(MachineState *machine) virt_high_pcie_memmap.base, virt_high_pcie_memmap.size, memmap[VIRT_PCIE_PIO].base, - pcie_irqchip); + pcie_irqchip, s); create_platform_bus(s, mmio_irqchip); diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index e5c474b26e..4ef1f660ab 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -60,6 +60,7 @@ struct RISCVVirtState { char *oem_table_id; OnOffAuto acpi; const MemMapEntry *memmap; + PCIBus *bus; }; enum {
The PCI bus information is needed in RISCVVirtState so that other files like virt-acpi-build.c can make use of it. Add new field in RISCVVirtState so that ACPI code can use it. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> --- hw/riscv/virt.c | 6 ++++-- include/hw/riscv/virt.h | 1 + 2 files changed, 5 insertions(+), 2 deletions(-)