diff mbox series

[v1,3/6] target/loongarch: Add REQUIRE_LSPW macro to check LSPW instructions

Message ID 20230810124112.236640-4-gaosong@loongson.cn (mailing list archive)
State New, archived
Headers show
Series Add some macros to check cpu features | expand

Commit Message

Song Gao Aug. 10, 2023, 12:41 p.m. UTC 
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/cpu.h                             | 2 ++
 target/loongarch/insn_trans/trans_privileged.c.inc | 8 ++++++++
 2 files changed, 10 insertions(+)
diff mbox series

Patch

diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index 5594d83011..13a4ab316a 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -462,6 +462,7 @@  static inline void set_pc(CPULoongArchState *env, uint64_t value)
 #define HW_FLAGS_FP         0x40
 #define HW_FLAGS_FP_SP      0x80
 #define HW_FLAGS_FP_DP      0x100
+#define HW_FLAGS_LSPW       0x200
 
 static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc,
                                         uint64_t *cs_base, uint32_t *flags)
@@ -475,6 +476,7 @@  static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc,
     *flags |= FIELD_EX32(env->cpucfg[2], CPUCFG2, FP) * HW_FLAGS_FP;
     *flags |= FIELD_EX32(env->cpucfg[2], CPUCFG2, FP_SP) * HW_FLAGS_FP_SP;
     *flags |= FIELD_EX32(env->cpucfg[2], CPUCFG2, FP_DP) * HW_FLAGS_FP_DP;
+    *flags |= FIELD_EX32(env->cpucfg[2], CPUCFG2, LSPW) * HW_FLAGS_LSPW;
 }
 
 void loongarch_cpu_list(void);
diff --git a/target/loongarch/insn_trans/trans_privileged.c.inc b/target/loongarch/insn_trans/trans_privileged.c.inc
index 9c9de090f0..210678dbb8 100644
--- a/target/loongarch/insn_trans/trans_privileged.c.inc
+++ b/target/loongarch/insn_trans/trans_privileged.c.inc
@@ -432,11 +432,18 @@  static bool trans_cacop(DisasContext *ctx, arg_cacop *a)
     return true;
 }
 
+#define REQUIRE_LSPW do { \
+    if ((ctx->base.tb->flags & HW_FLAGS_LSPW) == 0) { \
+        return false; \
+    } \
+} while (0)
+
 static bool trans_ldpte(DisasContext *ctx, arg_ldpte *a)
 {
     TCGv_i32 mem_idx = tcg_constant_i32(ctx->mem_idx);
     TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
 
+    REQUIRE_LSPW;
     if (check_plv(ctx)) {
         return false;
     }
@@ -450,6 +457,7 @@  static bool trans_lddir(DisasContext *ctx, arg_lddir *a)
     TCGv src = gpr_src(ctx, a->rj, EXT_NONE);
     TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
 
+    REQUIRE_LSPW;
     if (check_plv(ctx)) {
         return false;
     }