From patchwork Fri Aug 18 09:50:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13357853 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 304FBC71149 for ; Fri, 18 Aug 2023 14:06:16 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qX05Z-0004n2-7r; Fri, 18 Aug 2023 10:04:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qWwGg-0004ug-I4 for qemu-devel@nongnu.org; Fri, 18 Aug 2023 05:59:46 -0400 Received: from mgamail.intel.com ([192.55.52.120]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qWwGQ-0000JL-Dv for qemu-devel@nongnu.org; Fri, 18 Aug 2023 05:59:33 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1692352770; x=1723888770; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=iTeIjQmMojhvinRjMzjk62mPRc0ZaQ/Cr7AqNpnikfk=; b=iUBr3FUmut3Yr1Bi1CpA2DCkxznRFBaNlh+xrs/aPl4NFElC4FnWCD3x J4J+aq1VaAYiIYg2cOGUW80wwDVN8ELTgIar5pseZnjP+BFpFVEcy5huA zwdIenkTOn7VTZlQCUKK4LSRQAzeisHKOuizk/hj/83czBZ1XIqOd2jcF xKemFRmoKBlBeyDHo3XnG3WCEytACHZyLnWZdED21JQviPrjRZow+bZLm Jw/PJVgt0IeN5WyD66iRH+1IcW5r2eGC9VZYnP8Df8BHPqyc2TwblSbgF SBBlOTEs8x3mSLN4I+G+LAgo0jYy7pNcfdmwXysX0suXGEIP8I6ufodOz g==; X-IronPort-AV: E=McAfee;i="6600,9927,10805"; a="371966752" X-IronPort-AV: E=Sophos;i="6.01,182,1684825200"; d="scan'208";a="371966752" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Aug 2023 02:58:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10805"; a="849235542" X-IronPort-AV: E=Sophos;i="6.01,182,1684825200"; d="scan'208";a="849235542" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.46]) by fmsmga002.fm.intel.com with ESMTP; 18 Aug 2023 02:58:22 -0700 From: Xiaoyao Li To: Paolo Bonzini , Richard Henderson , "Michael S. Tsirkin" , Marcel Apfelbaum , Igor Mammedov , Ani Sinha , Peter Xu , David Hildenbrand , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?Dani?= =?utf-8?q?el_P=2E_Berrang=C3=A9?= , Cornelia Huck , Eric Blake , Markus Armbruster , Marcelo Tosatti , Gerd Hoffmann Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Eduardo Habkost , Laszlo Ersek , xiaoyao.li@intel.com, Isaku Yamahata , erdemaktas@google.com, Chenyi Qiang Subject: [PATCH v2 46/58] i386/tdx: Handle TDG.VP.VMCALL Date: Fri, 18 Aug 2023 05:50:29 -0400 Message-Id: <20230818095041.1973309-47-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230818095041.1973309-1-xiaoyao.li@intel.com> References: <20230818095041.1973309-1-xiaoyao.li@intel.com> MIME-Version: 1.0 Received-SPF: pass client-ip=192.55.52.120; envelope-from=xiaoyao.li@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.021, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.001, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Xiaoyao Li --- target/i386/kvm/tdx.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c index ced55be506d1..f111b46dac92 100644 --- a/target/i386/kvm/tdx.c +++ b/target/i386/kvm/tdx.c @@ -936,6 +936,7 @@ static void tdx_guest_class_init(ObjectClass *oc, void *data) #define TDG_VP_VMCALL_MAP_GPA 0x10001ULL #define TDG_VP_VMCALL_GET_QUOTE 0x10002ULL +#define TDG_VP_VMCALL_REPORT_FATAL_ERROR 0x10003ULL #define TDG_VP_VMCALL_SETUP_EVENT_NOTIFY_INTERRUPT 0x10004ULL #define TDG_VP_VMCALL_SUCCESS 0x0000000000000000ULL @@ -1407,6 +1408,42 @@ static void tdx_handle_get_quote(X86CPU *cpu, struct kvm_tdx_vmcall *vmcall) vmcall->status_code = TDG_VP_VMCALL_SUCCESS; } +static void tdx_handle_report_fatal_error(X86CPU *cpu, + struct kvm_tdx_vmcall *vmcall) +{ + uint64_t error_code = vmcall->in_r12; + char *message = NULL; + + if (error_code & 0xffff) { + error_report("invalid error code of TDG.VP.VMCALL\n"); + exit(1); + } + + /* it has optional message */ + if (vmcall->in_r14) { + uint64_t * tmp; + +#define GUEST_PANIC_INFO_TDX_MESSAGE_MAX 64 + message = g_malloc0(GUEST_PANIC_INFO_TDX_MESSAGE_MAX + 1); + + tmp = (uint64_t *)message; + /* The order is defined in TDX GHCI spec */ + *(tmp++) = cpu_to_le64(vmcall->in_r14); + *(tmp++) = cpu_to_le64(vmcall->in_r15); + *(tmp++) = cpu_to_le64(vmcall->in_rbx); + *(tmp++) = cpu_to_le64(vmcall->in_rdi); + *(tmp++) = cpu_to_le64(vmcall->in_rsi); + *(tmp++) = cpu_to_le64(vmcall->in_r8); + *(tmp++) = cpu_to_le64(vmcall->in_r9); + *(tmp++) = cpu_to_le64(vmcall->in_rdx); + message[GUEST_PANIC_INFO_TDX_MESSAGE_MAX] = '\0'; + assert((char *)tmp == message + GUEST_PANIC_INFO_TDX_MESSAGE_MAX); + } + + error_report("TD guest reports fatal error. %s\n", message ? : ""); + exit(1); +} + static void tdx_handle_setup_event_notify_interrupt(X86CPU *cpu, struct kvm_tdx_vmcall *vmcall) { @@ -1441,6 +1478,9 @@ static void tdx_handle_vmcall(X86CPU *cpu, struct kvm_tdx_vmcall *vmcall) case TDG_VP_VMCALL_GET_QUOTE: tdx_handle_get_quote(cpu, vmcall); break; + case TDG_VP_VMCALL_REPORT_FATAL_ERROR: + tdx_handle_report_fatal_error(cpu, vmcall); + break; case TDG_VP_VMCALL_SETUP_EVENT_NOTIFY_INTERRUPT: tdx_handle_setup_event_notify_interrupt(cpu, vmcall); break;