Message ID | 20230824142942.3983650-2-sunilvl@ventanamicro.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | RISC-V: ACPI: Enable AIA, PLIC and update RHCT | expand |
On Fri, Aug 25, 2023 at 12:30 AM Sunil V L <sunilvl@ventanamicro.com> wrote: > > RISC-V also needs to use the same code to create fw_cfg in DSDT. So, avoid > code duplication by moving the code in arm and riscv to a device specific > file. > > Suggested-by: Igor Mammedov <imammedo@redhat.com> > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/arm/virt-acpi-build.c | 19 ++----------------- > hw/nvram/fw_cfg-acpi.c | 17 +++++++++++++++++ > hw/nvram/meson.build | 1 + > hw/riscv/virt-acpi-build.c | 19 ++----------------- > include/hw/nvram/fw_cfg_acpi.h | 9 +++++++++ > 5 files changed, 31 insertions(+), 34 deletions(-) > create mode 100644 hw/nvram/fw_cfg-acpi.c > create mode 100644 include/hw/nvram/fw_cfg_acpi.h > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c > index 6b674231c2..b8e725d953 100644 > --- a/hw/arm/virt-acpi-build.c > +++ b/hw/arm/virt-acpi-build.c > @@ -35,7 +35,7 @@ > #include "target/arm/cpu.h" > #include "hw/acpi/acpi-defs.h" > #include "hw/acpi/acpi.h" > -#include "hw/nvram/fw_cfg.h" > +#include "hw/nvram/fw_cfg_acpi.h" > #include "hw/acpi/bios-linker-loader.h" > #include "hw/acpi/aml-build.h" > #include "hw/acpi/utils.h" > @@ -94,21 +94,6 @@ static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap, > aml_append(scope, dev); > } > > -static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMapEntry *fw_cfg_memmap) > -{ > - Aml *dev = aml_device("FWCF"); > - aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); > - /* device present, functioning, decoding, not shown in UI */ > - aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); > - aml_append(dev, aml_name_decl("_CCA", aml_int(1))); > - > - Aml *crs = aml_resource_template(); > - aml_append(crs, aml_memory32_fixed(fw_cfg_memmap->base, > - fw_cfg_memmap->size, AML_READ_WRITE)); > - aml_append(dev, aml_name_decl("_CRS", crs)); > - aml_append(scope, dev); > -} > - > static void acpi_dsdt_add_flash(Aml *scope, const MemMapEntry *flash_memmap) > { > Aml *dev, *crs; > @@ -864,7 +849,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) > if (vmc->acpi_expose_flash) { > acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]); > } > - acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]); > + fw_cfg_acpi_dsdt_add(scope, &memmap[VIRT_FW_CFG]); > acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO], > (irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS); > acpi_dsdt_add_pci(scope, memmap, irqmap[VIRT_PCIE] + ARM_SPI_BASE, vms); > diff --git a/hw/nvram/fw_cfg-acpi.c b/hw/nvram/fw_cfg-acpi.c > new file mode 100644 > index 0000000000..4eeb81bc36 > --- /dev/null > +++ b/hw/nvram/fw_cfg-acpi.c > @@ -0,0 +1,17 @@ > +#include "hw/nvram/fw_cfg_acpi.h" > +#include "hw/acpi/aml-build.h" > + > +void fw_cfg_acpi_dsdt_add(Aml *scope, const MemMapEntry *fw_cfg_memmap) > +{ > + Aml *dev = aml_device("FWCF"); > + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); > + /* device present, functioning, decoding, not shown in UI */ > + aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); > + aml_append(dev, aml_name_decl("_CCA", aml_int(1))); > + > + Aml *crs = aml_resource_template(); > + aml_append(crs, aml_memory32_fixed(fw_cfg_memmap->base, > + fw_cfg_memmap->size, AML_READ_WRITE)); > + aml_append(dev, aml_name_decl("_CRS", crs)); > + aml_append(scope, dev); > +} > diff --git a/hw/nvram/meson.build b/hw/nvram/meson.build > index 988dff6f8e..69e6df5aac 100644 > --- a/hw/nvram/meson.build > +++ b/hw/nvram/meson.build > @@ -21,3 +21,4 @@ system_ss.add(when: 'CONFIG_XLNX_EFUSE_ZYNQMP', if_true: files( > system_ss.add(when: 'CONFIG_XLNX_BBRAM', if_true: files('xlnx-bbram.c')) > > specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('spapr_nvram.c')) > +specific_ss.add(when: 'CONFIG_ACPI', if_true: files('fw_cfg-acpi.c')) > diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c > index 7331248f59..d8772c2821 100644 > --- a/hw/riscv/virt-acpi-build.c > +++ b/hw/riscv/virt-acpi-build.c > @@ -28,6 +28,7 @@ > #include "hw/acpi/acpi.h" > #include "hw/acpi/aml-build.h" > #include "hw/acpi/utils.h" > +#include "hw/nvram/fw_cfg_acpi.h" > #include "qapi/error.h" > #include "qemu/error-report.h" > #include "sysemu/reset.h" > @@ -97,22 +98,6 @@ static void acpi_dsdt_add_cpus(Aml *scope, RISCVVirtState *s) > } > } > > -static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMapEntry *fw_cfg_memmap) > -{ > - Aml *dev = aml_device("FWCF"); > - aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); > - > - /* device present, functioning, decoding, not shown in UI */ > - aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); > - aml_append(dev, aml_name_decl("_CCA", aml_int(1))); > - > - Aml *crs = aml_resource_template(); > - aml_append(crs, aml_memory32_fixed(fw_cfg_memmap->base, > - fw_cfg_memmap->size, AML_READ_WRITE)); > - aml_append(dev, aml_name_decl("_CRS", crs)); > - aml_append(scope, dev); > -} > - > /* RHCT Node[N] starts at offset 56 */ > #define RHCT_NODE_ARRAY_OFFSET 56 > > @@ -226,7 +211,7 @@ static void build_dsdt(GArray *table_data, > scope = aml_scope("\\_SB"); > acpi_dsdt_add_cpus(scope, s); > > - acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]); > + fw_cfg_acpi_dsdt_add(scope, &memmap[VIRT_FW_CFG]); > > aml_append(dsdt, scope); > > diff --git a/include/hw/nvram/fw_cfg_acpi.h b/include/hw/nvram/fw_cfg_acpi.h > new file mode 100644 > index 0000000000..6e2c5f04b7 > --- /dev/null > +++ b/include/hw/nvram/fw_cfg_acpi.h > @@ -0,0 +1,9 @@ > +#ifndef FW_CFG_ACPI_H > +#define FW_CFG_ACPI_H > + > +#include "qemu/osdep.h" > +#include "exec/hwaddr.h" > + > +void fw_cfg_acpi_dsdt_add(Aml *scope, const MemMapEntry *fw_cfg_memmap); > + > +#endif > -- > 2.39.2 > >
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 6b674231c2..b8e725d953 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -35,7 +35,7 @@ #include "target/arm/cpu.h" #include "hw/acpi/acpi-defs.h" #include "hw/acpi/acpi.h" -#include "hw/nvram/fw_cfg.h" +#include "hw/nvram/fw_cfg_acpi.h" #include "hw/acpi/bios-linker-loader.h" #include "hw/acpi/aml-build.h" #include "hw/acpi/utils.h" @@ -94,21 +94,6 @@ static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap, aml_append(scope, dev); } -static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMapEntry *fw_cfg_memmap) -{ - Aml *dev = aml_device("FWCF"); - aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); - /* device present, functioning, decoding, not shown in UI */ - aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); - aml_append(dev, aml_name_decl("_CCA", aml_int(1))); - - Aml *crs = aml_resource_template(); - aml_append(crs, aml_memory32_fixed(fw_cfg_memmap->base, - fw_cfg_memmap->size, AML_READ_WRITE)); - aml_append(dev, aml_name_decl("_CRS", crs)); - aml_append(scope, dev); -} - static void acpi_dsdt_add_flash(Aml *scope, const MemMapEntry *flash_memmap) { Aml *dev, *crs; @@ -864,7 +849,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) if (vmc->acpi_expose_flash) { acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]); } - acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]); + fw_cfg_acpi_dsdt_add(scope, &memmap[VIRT_FW_CFG]); acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO], (irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS); acpi_dsdt_add_pci(scope, memmap, irqmap[VIRT_PCIE] + ARM_SPI_BASE, vms); diff --git a/hw/nvram/fw_cfg-acpi.c b/hw/nvram/fw_cfg-acpi.c new file mode 100644 index 0000000000..4eeb81bc36 --- /dev/null +++ b/hw/nvram/fw_cfg-acpi.c @@ -0,0 +1,17 @@ +#include "hw/nvram/fw_cfg_acpi.h" +#include "hw/acpi/aml-build.h" + +void fw_cfg_acpi_dsdt_add(Aml *scope, const MemMapEntry *fw_cfg_memmap) +{ + Aml *dev = aml_device("FWCF"); + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); + /* device present, functioning, decoding, not shown in UI */ + aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); + aml_append(dev, aml_name_decl("_CCA", aml_int(1))); + + Aml *crs = aml_resource_template(); + aml_append(crs, aml_memory32_fixed(fw_cfg_memmap->base, + fw_cfg_memmap->size, AML_READ_WRITE)); + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); +} diff --git a/hw/nvram/meson.build b/hw/nvram/meson.build index 988dff6f8e..69e6df5aac 100644 --- a/hw/nvram/meson.build +++ b/hw/nvram/meson.build @@ -21,3 +21,4 @@ system_ss.add(when: 'CONFIG_XLNX_EFUSE_ZYNQMP', if_true: files( system_ss.add(when: 'CONFIG_XLNX_BBRAM', if_true: files('xlnx-bbram.c')) specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('spapr_nvram.c')) +specific_ss.add(when: 'CONFIG_ACPI', if_true: files('fw_cfg-acpi.c')) diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c index 7331248f59..d8772c2821 100644 --- a/hw/riscv/virt-acpi-build.c +++ b/hw/riscv/virt-acpi-build.c @@ -28,6 +28,7 @@ #include "hw/acpi/acpi.h" #include "hw/acpi/aml-build.h" #include "hw/acpi/utils.h" +#include "hw/nvram/fw_cfg_acpi.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "sysemu/reset.h" @@ -97,22 +98,6 @@ static void acpi_dsdt_add_cpus(Aml *scope, RISCVVirtState *s) } } -static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMapEntry *fw_cfg_memmap) -{ - Aml *dev = aml_device("FWCF"); - aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); - - /* device present, functioning, decoding, not shown in UI */ - aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); - aml_append(dev, aml_name_decl("_CCA", aml_int(1))); - - Aml *crs = aml_resource_template(); - aml_append(crs, aml_memory32_fixed(fw_cfg_memmap->base, - fw_cfg_memmap->size, AML_READ_WRITE)); - aml_append(dev, aml_name_decl("_CRS", crs)); - aml_append(scope, dev); -} - /* RHCT Node[N] starts at offset 56 */ #define RHCT_NODE_ARRAY_OFFSET 56 @@ -226,7 +211,7 @@ static void build_dsdt(GArray *table_data, scope = aml_scope("\\_SB"); acpi_dsdt_add_cpus(scope, s); - acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]); + fw_cfg_acpi_dsdt_add(scope, &memmap[VIRT_FW_CFG]); aml_append(dsdt, scope); diff --git a/include/hw/nvram/fw_cfg_acpi.h b/include/hw/nvram/fw_cfg_acpi.h new file mode 100644 index 0000000000..6e2c5f04b7 --- /dev/null +++ b/include/hw/nvram/fw_cfg_acpi.h @@ -0,0 +1,9 @@ +#ifndef FW_CFG_ACPI_H +#define FW_CFG_ACPI_H + +#include "qemu/osdep.h" +#include "exec/hwaddr.h" + +void fw_cfg_acpi_dsdt_add(Aml *scope, const MemMapEntry *fw_cfg_memmap); + +#endif
RISC-V also needs to use the same code to create fw_cfg in DSDT. So, avoid code duplication by moving the code in arm and riscv to a device specific file. Suggested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> --- hw/arm/virt-acpi-build.c | 19 ++----------------- hw/nvram/fw_cfg-acpi.c | 17 +++++++++++++++++ hw/nvram/meson.build | 1 + hw/riscv/virt-acpi-build.c | 19 ++----------------- include/hw/nvram/fw_cfg_acpi.h | 9 +++++++++ 5 files changed, 31 insertions(+), 34 deletions(-) create mode 100644 hw/nvram/fw_cfg-acpi.c create mode 100644 include/hw/nvram/fw_cfg_acpi.h