From patchwork Thu Aug 24 14:29:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13364257 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 88368C6FA8F for ; Thu, 24 Aug 2023 14:31:35 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qZBLh-0007tL-Rx; Thu, 24 Aug 2023 10:30:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qZBLh-0007su-7L for qemu-devel@nongnu.org; Thu, 24 Aug 2023 10:30:13 -0400 Received: from mail-oa1-x2f.google.com ([2001:4860:4864:20::2f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qZBLe-0000AX-5u for qemu-devel@nongnu.org; Thu, 24 Aug 2023 10:30:12 -0400 Received: by mail-oa1-x2f.google.com with SMTP id 586e51a60fabf-1cc61f514baso3106523fac.1 for ; Thu, 24 Aug 2023 07:30:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1692887408; x=1693492208; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zfFqdPtHLQvYRAvHSc2Gm780+2CB9SAvKYRl85qGXZA=; b=mgq0+C+7gmDwNTPYlqftuvmbyhtxrT+Ae/6iKjpKUJ4jlrpuh9yqBDKxrQZmeAYaev GtdCSabE7lxlYfPITN8rYr0i6XFSAUC2XvTsf9l2zk2aJi/31U155fkKnF5M/WEA0clD 4tnk4EFkYGSqD5wpchL1LFBzsOjDflyokJc6v5JczXek4Ik4xH2RWLC51S3h+y2CHFgm uYDjuMvH5k64Hb/ZV7/zAToHdZjPYvGP1H03xrAMV/VRu7ryEv78YUfUuuaTocymM+2y Ac1+NlF0WZOJFuGG2LPBb4YhLU6H966z+4JKUQ1X7FSF9DkMHDSaNhZYSHYHcpvt+rPk 8ufQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692887408; x=1693492208; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zfFqdPtHLQvYRAvHSc2Gm780+2CB9SAvKYRl85qGXZA=; b=ipsOW7gBc535KwAnRETZmYuv+4va7aWWWAlFZYuSajyY0BBYWo8WBcrLcFBW7SLs2q Ue8cTvsE2d+m7BKB26aCvrarHtimsX8+Ky8Z9dWXyrseWXuz3jOMZng+K4bNxpnKQSNN ubX3bziHbOgY4/5qE4vY3OHkz13fkkj1M3BAYjyUo4yGXsX1VcmRAZpqezHb8YwZ1fXz VdFm7CtWM0lJHnYCXJPwKF5HpQKELKIT4X7f9mhIOM9Jm2WiJXXjaKHxBNyz96fVTCxC 0rKaTMmgg86QZrUd6Pt2wxwKaayjqY84sImzUxzqwPBK+RqfaLMePswoBIrFVAj11dTr fBCg== X-Gm-Message-State: AOJu0YzJgDxRPs4AI1xF3GV4UQfCLR3P6IMrQSUqmhBw4Jdneqayt7YP 6KWTVihKAiK3qNiI8P5xB6Ypbw== X-Google-Smtp-Source: AGHT+IEHSLbj0e/TiUx11GxJukLuoLOAG+8XtMuAkktheHEa6Ru2GGglRi8OLYdhhm953AcBBLp4oA== X-Received: by 2002:a05:6870:c154:b0:1bb:eb37:1d69 with SMTP id g20-20020a056870c15400b001bbeb371d69mr16610212oad.14.1692887408653; Thu, 24 Aug 2023 07:30:08 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.191.205]) by smtp.gmail.com with ESMTPSA id n6-20020a17090a2bc600b00262fc3d911esm1666864pje.28.2023.08.24.07.30.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Aug 2023 07:30:06 -0700 (PDT) From: Sunil V L To: qemu-arm@nongnu.org, qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Shannon Zhao , Peter Maydell , "Michael S . Tsirkin" , Igor Mammedov , Ani Sinha , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gerd Hoffmann , Paolo Bonzini , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Anup Patel , Andrew Jones , Atish Kumar Patra , Haibo Xu , Sunil V L Subject: [PATCH v2 01/12] hw/arm/virt-acpi-build.c: Migrate fw_cfg creation to common location Date: Thu, 24 Aug 2023 19:59:31 +0530 Message-Id: <20230824142942.3983650-2-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230824142942.3983650-1-sunilvl@ventanamicro.com> References: <20230824142942.3983650-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::2f; envelope-from=sunilvl@ventanamicro.com; helo=mail-oa1-x2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org RISC-V also needs to use the same code to create fw_cfg in DSDT. So, avoid code duplication by moving the code in arm and riscv to a device specific file. Suggested-by: Igor Mammedov Signed-off-by: Sunil V L Reviewed-by: Alistair Francis --- hw/arm/virt-acpi-build.c | 19 ++----------------- hw/nvram/fw_cfg-acpi.c | 17 +++++++++++++++++ hw/nvram/meson.build | 1 + hw/riscv/virt-acpi-build.c | 19 ++----------------- include/hw/nvram/fw_cfg_acpi.h | 9 +++++++++ 5 files changed, 31 insertions(+), 34 deletions(-) create mode 100644 hw/nvram/fw_cfg-acpi.c create mode 100644 include/hw/nvram/fw_cfg_acpi.h diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 6b674231c2..b8e725d953 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -35,7 +35,7 @@ #include "target/arm/cpu.h" #include "hw/acpi/acpi-defs.h" #include "hw/acpi/acpi.h" -#include "hw/nvram/fw_cfg.h" +#include "hw/nvram/fw_cfg_acpi.h" #include "hw/acpi/bios-linker-loader.h" #include "hw/acpi/aml-build.h" #include "hw/acpi/utils.h" @@ -94,21 +94,6 @@ static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap, aml_append(scope, dev); } -static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMapEntry *fw_cfg_memmap) -{ - Aml *dev = aml_device("FWCF"); - aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); - /* device present, functioning, decoding, not shown in UI */ - aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); - aml_append(dev, aml_name_decl("_CCA", aml_int(1))); - - Aml *crs = aml_resource_template(); - aml_append(crs, aml_memory32_fixed(fw_cfg_memmap->base, - fw_cfg_memmap->size, AML_READ_WRITE)); - aml_append(dev, aml_name_decl("_CRS", crs)); - aml_append(scope, dev); -} - static void acpi_dsdt_add_flash(Aml *scope, const MemMapEntry *flash_memmap) { Aml *dev, *crs; @@ -864,7 +849,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) if (vmc->acpi_expose_flash) { acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]); } - acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]); + fw_cfg_acpi_dsdt_add(scope, &memmap[VIRT_FW_CFG]); acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO], (irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS); acpi_dsdt_add_pci(scope, memmap, irqmap[VIRT_PCIE] + ARM_SPI_BASE, vms); diff --git a/hw/nvram/fw_cfg-acpi.c b/hw/nvram/fw_cfg-acpi.c new file mode 100644 index 0000000000..4eeb81bc36 --- /dev/null +++ b/hw/nvram/fw_cfg-acpi.c @@ -0,0 +1,17 @@ +#include "hw/nvram/fw_cfg_acpi.h" +#include "hw/acpi/aml-build.h" + +void fw_cfg_acpi_dsdt_add(Aml *scope, const MemMapEntry *fw_cfg_memmap) +{ + Aml *dev = aml_device("FWCF"); + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); + /* device present, functioning, decoding, not shown in UI */ + aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); + aml_append(dev, aml_name_decl("_CCA", aml_int(1))); + + Aml *crs = aml_resource_template(); + aml_append(crs, aml_memory32_fixed(fw_cfg_memmap->base, + fw_cfg_memmap->size, AML_READ_WRITE)); + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); +} diff --git a/hw/nvram/meson.build b/hw/nvram/meson.build index 988dff6f8e..69e6df5aac 100644 --- a/hw/nvram/meson.build +++ b/hw/nvram/meson.build @@ -21,3 +21,4 @@ system_ss.add(when: 'CONFIG_XLNX_EFUSE_ZYNQMP', if_true: files( system_ss.add(when: 'CONFIG_XLNX_BBRAM', if_true: files('xlnx-bbram.c')) specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('spapr_nvram.c')) +specific_ss.add(when: 'CONFIG_ACPI', if_true: files('fw_cfg-acpi.c')) diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c index 7331248f59..d8772c2821 100644 --- a/hw/riscv/virt-acpi-build.c +++ b/hw/riscv/virt-acpi-build.c @@ -28,6 +28,7 @@ #include "hw/acpi/acpi.h" #include "hw/acpi/aml-build.h" #include "hw/acpi/utils.h" +#include "hw/nvram/fw_cfg_acpi.h" #include "qapi/error.h" #include "qemu/error-report.h" #include "sysemu/reset.h" @@ -97,22 +98,6 @@ static void acpi_dsdt_add_cpus(Aml *scope, RISCVVirtState *s) } } -static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMapEntry *fw_cfg_memmap) -{ - Aml *dev = aml_device("FWCF"); - aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); - - /* device present, functioning, decoding, not shown in UI */ - aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); - aml_append(dev, aml_name_decl("_CCA", aml_int(1))); - - Aml *crs = aml_resource_template(); - aml_append(crs, aml_memory32_fixed(fw_cfg_memmap->base, - fw_cfg_memmap->size, AML_READ_WRITE)); - aml_append(dev, aml_name_decl("_CRS", crs)); - aml_append(scope, dev); -} - /* RHCT Node[N] starts at offset 56 */ #define RHCT_NODE_ARRAY_OFFSET 56 @@ -226,7 +211,7 @@ static void build_dsdt(GArray *table_data, scope = aml_scope("\\_SB"); acpi_dsdt_add_cpus(scope, s); - acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]); + fw_cfg_acpi_dsdt_add(scope, &memmap[VIRT_FW_CFG]); aml_append(dsdt, scope); diff --git a/include/hw/nvram/fw_cfg_acpi.h b/include/hw/nvram/fw_cfg_acpi.h new file mode 100644 index 0000000000..6e2c5f04b7 --- /dev/null +++ b/include/hw/nvram/fw_cfg_acpi.h @@ -0,0 +1,9 @@ +#ifndef FW_CFG_ACPI_H +#define FW_CFG_ACPI_H + +#include "qemu/osdep.h" +#include "exec/hwaddr.h" + +void fw_cfg_acpi_dsdt_add(Aml *scope, const MemMapEntry *fw_cfg_memmap); + +#endif