| Message ID | 20230825033619.2075837-5-zhao1.liu@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | tests: Add CPU topology related smbios test cases | expand |
On Fri, 25 Aug 2023 11:36:07 +0800 Zhao Liu <zhao1.liu@linux.intel.com> wrote: copy/past mistake in subj? shouldn't it be for 'smbios type4 count'? > From: Zhao Liu <zhao1.liu@intel.com> > > Following the guidelines in tests/qtest/bios-tables-test.c, this > is step 5 and 6. > > Changes in the tables: > FACP: > > +/* > + * Intel ACPI Component Architecture > + * AML/ASL+ Disassembler version 20200925 (64-bit version) > + * Copyright (c) 2000 - 2020 Intel Corporation > + * > + * Disassembly of /tmp/aml-W37791, Wed Aug 23 10:36:32 2023 > + * > + * ACPI Data Table [FACP] > + * > + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue > + */ > + > +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] > +[004h 0004 4] Table Length : 000000F4 > +[008h 0008 1] Revision : 03 > +[009h 0009 1] Checksum : B3 > +[00Ah 0010 6] Oem ID : "BOCHS " > +[010h 0016 8] Oem Table ID : "BXPC " > +[018h 0024 4] Oem Revision : 00000001 > +[01Ch 0028 4] Asl Compiler ID : "BXPC" > +[020h 0032 4] Asl Compiler Revision : 00000001 > + > +[024h 0036 4] FACS Address : 00000000 > +[028h 0040 4] DSDT Address : 00000000 > +[02Ch 0044 1] Model : 01 > +[02Dh 0045 1] PM Profile : 00 [Unspecified] > +[02Eh 0046 2] SCI Interrupt : 0009 > +[030h 0048 4] SMI Command Port : 000000B2 > +[034h 0052 1] ACPI Enable Value : 02 > +[035h 0053 1] ACPI Disable Value : 03 > +[036h 0054 1] S4BIOS Command : 00 > +[037h 0055 1] P-State Control : 00 > +[038h 0056 4] PM1A Event Block Address : 00000600 > +[03Ch 0060 4] PM1B Event Block Address : 00000000 > +[040h 0064 4] PM1A Control Block Address : 00000604 > +[044h 0068 4] PM1B Control Block Address : 00000000 > +[048h 0072 4] PM2 Control Block Address : 00000000 > +[04Ch 0076 4] PM Timer Block Address : 00000608 > +[050h 0080 4] GPE0 Block Address : 00000620 > +[054h 0084 4] GPE1 Block Address : 00000000 > +[058h 0088 1] PM1 Event Block Length : 04 > +[059h 0089 1] PM1 Control Block Length : 02 > +[05Ah 0090 1] PM2 Control Block Length : 00 > +[05Bh 0091 1] PM Timer Block Length : 04 > +[05Ch 0092 1] GPE0 Block Length : 10 > +[05Dh 0093 1] GPE1 Block Length : 00 > +[05Eh 0094 1] GPE1 Base Offset : 00 > +[05Fh 0095 1] _CST Support : 00 > +[060h 0096 2] C2 Latency : 0FFF > +[062h 0098 2] C3 Latency : 0FFF > +[064h 0100 2] CPU Cache Size : 0000 > +[066h 0102 2] Cache Flush Stride : 0000 > +[068h 0104 1] Duty Cycle Offset : 00 > +[069h 0105 1] Duty Cycle Width : 00 > +[06Ah 0106 1] RTC Day Alarm Index : 00 > +[06Bh 0107 1] RTC Month Alarm Index : 00 > +[06Ch 0108 1] RTC Century Index : 32 > +[06Dh 0109 2] Boot Flags (decoded below) : 0002 > + Legacy Devices Supported (V2) : 0 > + 8042 Present on ports 60/64 (V2) : 1 > + VGA Not Present (V4) : 0 > + MSI Not Supported (V4) : 0 > + PCIe ASPM Not Supported (V4) : 0 > + CMOS RTC Not Present (V5) : 0 > +[06Fh 0111 1] Reserved : 00 > +[070h 0112 4] Flags (decoded below) : 000484A5 > + WBINVD instruction is operational (V1) : 1 > + WBINVD flushes all caches (V1) : 0 > + All CPUs support C1 (V1) : 1 > + C2 works on MP system (V1) : 0 > + Control Method Power Button (V1) : 0 > + Control Method Sleep Button (V1) : 1 > + RTC wake not in fixed reg space (V1) : 0 > + RTC can wake system from S4 (V1) : 1 > + 32-bit PM Timer (V1) : 0 > + Docking Supported (V1) : 0 > + Reset Register Supported (V2) : 1 > + Sealed Case (V3) : 0 > + Headless - No Video (V3) : 0 > + Use native instr after SLP_TYPx (V3) : 0 > + PCIEXP_WAK Bits Supported (V4) : 0 > + Use Platform Timer (V4) : 1 > + RTC_STS valid on S4 wake (V4) : 0 > + Remote Power-on capable (V4) : 0 > + Use APIC Cluster Model (V4) : 1 > + Use APIC Physical Destination Mode (V4) : 0 > + Hardware Reduced (V5) : 0 > + Low Power S0 Idle (V5) : 0 > + > +[074h 0116 12] Reset Register : [Generic Address Structure] > +[074h 0116 1] Space ID : 01 [SystemIO] > +[075h 0117 1] Bit Width : 08 > +[076h 0118 1] Bit Offset : 00 > +[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy] > +[078h 0120 8] Address : 0000000000000CF9 > + > +[080h 0128 1] Value to cause reset : 0F > +[081h 0129 2] ARM Flags (decoded below) : 0000 > + PSCI Compliant : 0 > + Must use HVC for PSCI : 0 > + > +[083h 0131 1] FADT Minor Revision : 00 > +[084h 0132 8] FACS Address : 0000000000000000 > +[08Ch 0140 8] DSDT Address : 0000000000000000 > +[094h 0148 12] PM1A Event Block : [Generic Address Structure] > +[094h 0148 1] Space ID : 01 [SystemIO] > +[095h 0149 1] Bit Width : 20 > +[096h 0150 1] Bit Offset : 00 > +[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy] > +[098h 0152 8] Address : 0000000000000600 > + > +[0A0h 0160 12] PM1B Event Block : [Generic Address Structure] > +[0A0h 0160 1] Space ID : 00 [SystemMemory] > +[0A1h 0161 1] Bit Width : 00 > +[0A2h 0162 1] Bit Offset : 00 > +[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy] > +[0A4h 0164 8] Address : 0000000000000000 > + > +[0ACh 0172 12] PM1A Control Block : [Generic Address Structure] > +[0ACh 0172 1] Space ID : 01 [SystemIO] > +[0ADh 0173 1] Bit Width : 10 > +[0AEh 0174 1] Bit Offset : 00 > +[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy] > +[0B0h 0176 8] Address : 0000000000000604 > + > +[0B8h 0184 12] PM1B Control Block : [Generic Address Structure] > +[0B8h 0184 1] Space ID : 00 [SystemMemory] > +[0B9h 0185 1] Bit Width : 00 > +[0BAh 0186 1] Bit Offset : 00 > +[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy] > +[0BCh 0188 8] Address : 0000000000000000 > + > +[0C4h 0196 12] PM2 Control Block : [Generic Address Structure] > +[0C4h 0196 1] Space ID : 00 [SystemMemory] > +[0C5h 0197 1] Bit Width : 00 > +[0C6h 0198 1] Bit Offset : 00 > +[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy] > +[0C8h 0200 8] Address : 0000000000000000 > + > +[0D0h 0208 12] PM Timer Block : [Generic Address Structure] > +[0D0h 0208 1] Space ID : 01 [SystemIO] > +[0D1h 0209 1] Bit Width : 20 > +[0D2h 0210 1] Bit Offset : 00 > +[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy] > +[0D4h 0212 8] Address : 0000000000000608 > + > +[0DCh 0220 12] GPE0 Block : [Generic Address Structure] > +[0DCh 0220 1] Space ID : 01 [SystemIO] > +[0DDh 0221 1] Bit Width : 80 > +[0DEh 0222 1] Bit Offset : 00 > +[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy] > +[0E0h 0224 8] Address : 0000000000000620 > + > +[0E8h 0232 12] GPE1 Block : [Generic Address Structure] > +[0E8h 0232 1] Space ID : 00 [SystemMemory] > +[0E9h 0233 1] Bit Width : 00 > +[0EAh 0234 1] Bit Offset : 00 > +[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy] > +[0ECh 0236 8] Address : 0000000000000000 > + > ... > > APIC: > > +/* > + * Intel ACPI Component Architecture > + * AML/ASL+ Disassembler version 20200925 (64-bit version) > + * Copyright (c) 2000 - 2020 Intel Corporation > + * > + * Disassembly of /tmp/aml-687791, Wed Aug 23 10:36:32 2023 > + * > + * ACPI Data Table [APIC] > + * > + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue > + */ > + > +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] > +[004h 0004 4] Table Length : 00000430 > +[008h 0008 1] Revision : 03 > +[009h 0009 1] Checksum : C5 > +[00Ah 0010 6] Oem ID : "BOCHS " > +[010h 0016 8] Oem Table ID : "BXPC " > +[018h 0024 4] Oem Revision : 00000001 > +[01Ch 0028 4] Asl Compiler ID : "BXPC" > +[020h 0032 4] Asl Compiler Revision : 00000001 > + > +[024h 0036 4] Local Apic Address : FEE00000 > +[028h 0040 4] Flags (decoded below) : 00000001 > + PC-AT Compatibility : 1 > + > +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] > +[02Dh 0045 1] Length : 08 > +[02Eh 0046 1] Processor ID : 00 > +[02Fh 0047 1] Local Apic ID : 00 > +[030h 0048 4] Flags (decoded below) : 00000001 > + Processor Enabled : 1 > + Runtime Online Capable : 0 > + > +[034h 0052 1] Subtable Type : 00 [Processor Local APIC] > +[035h 0053 1] Length : 08 > +[036h 0054 1] Processor ID : 01 > +[037h 0055 1] Local Apic ID : 01 > +[038h 0056 4] Flags (decoded below) : 00000001 > + Processor Enabled : 1 > + Runtime Online Capable : 0 > > [snip] > > +[3E4h 0996 1] Subtable Type : 00 [Processor Local APIC] > +[3E5h 0997 1] Length : 08 > +[3E6h 0998 1] Processor ID : 77 > +[3E7h 0999 1] Local Apic ID : 9E > +[3E8h 1000 4] Flags (decoded below) : 00000000 > + Processor Enabled : 0 > + Runtime Online Capable : 0 > + > +[3ECh 1004 1] Subtable Type : 01 [I/O APIC] > +[3EDh 1005 1] Length : 0C > +[3EEh 1006 1] I/O Apic ID : 00 > +[3EFh 1007 1] Reserved : 00 > +[3F0h 1008 4] Address : FEC00000 > +[3F4h 1012 4] Interrupt : 00000000 > + > +[3F8h 1016 1] Subtable Type : 02 [Interrupt Source Override] > +[3F9h 1017 1] Length : 0A > +[3FAh 1018 1] Bus : 00 > +[3FBh 1019 1] Source : 00 > +[3FCh 1020 4] Interrupt : 00000002 > +[400h 1024 2] Flags (decoded below) : 0000 > + Polarity : 0 > + Trigger Mode : 0 > + > +[402h 1026 1] Subtable Type : 02 [Interrupt Source Override] > +[403h 1027 1] Length : 0A > +[404h 1028 1] Bus : 00 > +[405h 1029 1] Source : 05 > +[406h 1030 4] Interrupt : 00000005 > +[40Ah 1034 2] Flags (decoded below) : 000D > + Polarity : 1 > + Trigger Mode : 3 > + > +[40Ch 1036 1] Subtable Type : 02 [Interrupt Source Override] > +[40Dh 1037 1] Length : 0A > +[40Eh 1038 1] Bus : 00 > +[40Fh 1039 1] Source : 09 > +[410h 1040 4] Interrupt : 00000009 > +[414h 1044 2] Flags (decoded below) : 000D > + Polarity : 1 > + Trigger Mode : 3 > + > +[416h 1046 1] Subtable Type : 02 [Interrupt Source Override] > +[417h 1047 1] Length : 0A > +[418h 1048 1] Bus : 00 > +[419h 1049 1] Source : 0A > +[41Ah 1050 4] Interrupt : 0000000A > +[41Eh 1054 2] Flags (decoded below) : 000D > + Polarity : 1 > + Trigger Mode : 3 > + > +[420h 1056 1] Subtable Type : 02 [Interrupt Source Override] > +[421h 1057 1] Length : 0A > +[422h 1058 1] Bus : 00 > +[423h 1059 1] Source : 0B > +[424h 1060 4] Interrupt : 0000000B > +[428h 1064 2] Flags (decoded below) : 000D > + Polarity : 1 > + Trigger Mode : 3 > + > +[42Ah 1066 1] Subtable Type : 04 [Local APIC NMI] > +[42Bh 1067 1] Length : 06 > +[42Ch 1068 1] Processor ID : FF > +[42Dh 1069 2] Flags (decoded below) : 0000 > + Polarity : 0 > + Trigger Mode : 0 > +[42Fh 1071 1] Interrupt Input LINT : 01 > + > ... > > DSDT: > > +/* > + * Intel ACPI Component Architecture > + * AML/ASL+ Disassembler version 20200925 (64-bit version) > + * Copyright (c) 2000 - 2020 Intel Corporation > + * > + * Disassembling to symbolic ASL+ operators > + * > + * Disassembly of /tmp/aml-8G8791, Wed Aug 23 10:36:32 2023 > + * > + * Original Table Header: > + * Signature "DSDT" > + * Length 0x0000489D (18589) > + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support > + * Checksum 0xDB > + * OEM ID "BOCHS " > + * OEM Table ID "BXPC " > + * OEM Revision 0x00000001 (1) > + * Compiler ID "BXPC" > + * Compiler Version 0x00000001 (1) > + */ > +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) > +{ > + Scope (\) > + { > + OperationRegion (DBG, SystemIO, 0x0402, One) > + Field (DBG, ByteAcc, NoLock, Preserve) > + { > + DBGB, 8 > + } > + > + Method (DBUG, 1, NotSerialized) > + { > + ToHexString (Arg0, Local0) > + ToBuffer (Local0, Local0) > + Local1 = (SizeOf (Local0) - One) > + Local2 = Zero > + While ((Local2 < Local1)) > + { > + DBGB = DerefOf (Local0 [Local2]) > + Local2++ > + } > + > + DBGB = 0x0A > + } > + } > + > > [snip] > > + > + Processor (C000, 0x00, 0x00000000, 0x00) > + { > + Method (_STA, 0, Serialized) // _STA: Status > + { > + Return (CSTA (Zero)) > + } > + > + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry > + { > + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ > + }) > + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication > + { > + COST (Zero, Arg0, Arg1, Arg2) > + } > + } > + > + Processor (C001, 0x01, 0x00000000, 0x00) > + { > + Method (_STA, 0, Serialized) // _STA: Status > + { > + Return (CSTA (One)) > + } > + > + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry > + { > + 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........ > + }) > + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 > + { > + CEJ0 (One) > + } > + > + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication > + { > + COST (One, Arg0, Arg1, Arg2) > + } > + } > > [snip] > > + Processor (C077, 0x77, 0x00000000, 0x00) > + { > + Method (_STA, 0, Serialized) // _STA: Status > + { > + Return (CSTA (0x77)) > + } > + > + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry > + { > + 0x00, 0x08, 0x77, 0x9E, 0x01, 0x00, 0x00, 0x00 // ..w..... > + }) > + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 > + { > + CEJ0 (0x77) > + } > + > + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication > + { > + COST (0x77, Arg0, Arg1, Arg2) > + } > + } > + } > + } > + > ... > > Signed-off-by: Zhao Liu <zhao1.liu@intel.com> > --- > tests/data/acpi/q35/APIC.type4-count | Bin 0 -> 1072 bytes > tests/data/acpi/q35/DSDT.type4-count | Bin 0 -> 18589 bytes > tests/data/acpi/q35/FACP.type4-count | Bin 0 -> 244 bytes > tests/qtest/bios-tables-test-allowed-diff.h | 3 --- > 4 files changed, 3 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k4HL_0D`%79y!#9|m3SZ}4*20fB#f^~_-_Ll_+6a;1CLN!@c;k- > > literal 0 > HcmV?d00001 > > diff --git a/tests/data/acpi/q35/FACP.type4-count b/tests/data/acpi/q35/FACP.type4-count > index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..31fa5dd19c213034eef4eeefa6a04e61dadd8a2a 100644 > GIT binary patch > literal 244 > zcmZ>BbPo8!z`($~*~#D8BUr&HBEVSz2pEB4AU24G0Y(N+hD|^Y6El!tgNU*~X%LSC > z$X0-fGcm9T0LA|E|L2FOWMD92VqjR>!otAF!NBm72O<iWged~jj0!*k$y^{03>bk1 > YBHITON2VDSAnpK(F*YFF1LDH~0O^Si0RR91 > > literal 0 > HcmV?d00001 > > diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h > index 0ce6f8fc72ee..dfb8523c8bf4 100644 > --- a/tests/qtest/bios-tables-test-allowed-diff.h > +++ b/tests/qtest/bios-tables-test-allowed-diff.h > @@ -1,4 +1 @@ > /* List of comma-separated changed AML files to ignore */ > -"tests/data/acpi/q35/APIC.type4-count", > -"tests/data/acpi/q35/DSDT.type4-count", > -"tests/data/acpi/q35/FACP.type4-count",
Hi Igor, On Fri, Sep 15, 2023 at 03:05:10PM +0200, Igor Mammedov wrote: > Date: Fri, 15 Sep 2023 15:05:10 +0200 > From: Igor Mammedov <imammedo@redhat.com> > Subject: Re: [PATCH 04/16] tests: bios-tables-test: Add ACPI table binaries > for type4 count test > X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; x86_64-redhat-linux-gnu) > > On Fri, 25 Aug 2023 11:36:07 +0800 > Zhao Liu <zhao1.liu@linux.intel.com> wrote: > > copy/past mistake in subj? > > shouldn't it be for 'smbios type4 count'? Thanks! I just thought the subject is too long and omitted the word "smbios", I'll correct it as: "tests: bios-tables-test: Add ACPI table binaries for smbios type4 count test" -Zhao > > > From: Zhao Liu <zhao1.liu@intel.com> > > > > Following the guidelines in tests/qtest/bios-tables-test.c, this > > is step 5 and 6. > > > > Changes in the tables: > > FACP: > > > > +/* > > + * Intel ACPI Component Architecture > > + * AML/ASL+ Disassembler version 20200925 (64-bit version) > > + * Copyright (c) 2000 - 2020 Intel Corporation > > + * > > + * Disassembly of /tmp/aml-W37791, Wed Aug 23 10:36:32 2023 > > + * > > + * ACPI Data Table [FACP] > > + * > > + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue > > + */ > > + > > +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] > > +[004h 0004 4] Table Length : 000000F4 > > +[008h 0008 1] Revision : 03 > > +[009h 0009 1] Checksum : B3 > > +[00Ah 0010 6] Oem ID : "BOCHS " > > +[010h 0016 8] Oem Table ID : "BXPC " > > +[018h 0024 4] Oem Revision : 00000001 > > +[01Ch 0028 4] Asl Compiler ID : "BXPC" > > +[020h 0032 4] Asl Compiler Revision : 00000001 > > + > > +[024h 0036 4] FACS Address : 00000000 > > +[028h 0040 4] DSDT Address : 00000000 > > +[02Ch 0044 1] Model : 01 > > +[02Dh 0045 1] PM Profile : 00 [Unspecified] > > +[02Eh 0046 2] SCI Interrupt : 0009 > > +[030h 0048 4] SMI Command Port : 000000B2 > > +[034h 0052 1] ACPI Enable Value : 02 > > +[035h 0053 1] ACPI Disable Value : 03 > > +[036h 0054 1] S4BIOS Command : 00 > > +[037h 0055 1] P-State Control : 00 > > +[038h 0056 4] PM1A Event Block Address : 00000600 > > +[03Ch 0060 4] PM1B Event Block Address : 00000000 > > +[040h 0064 4] PM1A Control Block Address : 00000604 > > +[044h 0068 4] PM1B Control Block Address : 00000000 > > +[048h 0072 4] PM2 Control Block Address : 00000000 > > +[04Ch 0076 4] PM Timer Block Address : 00000608 > > +[050h 0080 4] GPE0 Block Address : 00000620 > > +[054h 0084 4] GPE1 Block Address : 00000000 > > +[058h 0088 1] PM1 Event Block Length : 04 > > +[059h 0089 1] PM1 Control Block Length : 02 > > +[05Ah 0090 1] PM2 Control Block Length : 00 > > +[05Bh 0091 1] PM Timer Block Length : 04 > > +[05Ch 0092 1] GPE0 Block Length : 10 > > +[05Dh 0093 1] GPE1 Block Length : 00 > > +[05Eh 0094 1] GPE1 Base Offset : 00 > > +[05Fh 0095 1] _CST Support : 00 > > +[060h 0096 2] C2 Latency : 0FFF > > +[062h 0098 2] C3 Latency : 0FFF > > +[064h 0100 2] CPU Cache Size : 0000 > > +[066h 0102 2] Cache Flush Stride : 0000 > > +[068h 0104 1] Duty Cycle Offset : 00 > > +[069h 0105 1] Duty Cycle Width : 00 > > +[06Ah 0106 1] RTC Day Alarm Index : 00 > > +[06Bh 0107 1] RTC Month Alarm Index : 00 > > +[06Ch 0108 1] RTC Century Index : 32 > > +[06Dh 0109 2] Boot Flags (decoded below) : 0002 > > + Legacy Devices Supported (V2) : 0 > > + 8042 Present on ports 60/64 (V2) : 1 > > + VGA Not Present (V4) : 0 > > + MSI Not Supported (V4) : 0 > > + PCIe ASPM Not Supported (V4) : 0 > > + CMOS RTC Not Present (V5) : 0 > > +[06Fh 0111 1] Reserved : 00 > > +[070h 0112 4] Flags (decoded below) : 000484A5 > > + WBINVD instruction is operational (V1) : 1 > > + WBINVD flushes all caches (V1) : 0 > > + All CPUs support C1 (V1) : 1 > > + C2 works on MP system (V1) : 0 > > + Control Method Power Button (V1) : 0 > > + Control Method Sleep Button (V1) : 1 > > + RTC wake not in fixed reg space (V1) : 0 > > + RTC can wake system from S4 (V1) : 1 > > + 32-bit PM Timer (V1) : 0 > > + Docking Supported (V1) : 0 > > + Reset Register Supported (V2) : 1 > > + Sealed Case (V3) : 0 > > + Headless - No Video (V3) : 0 > > + Use native instr after SLP_TYPx (V3) : 0 > > + PCIEXP_WAK Bits Supported (V4) : 0 > > + Use Platform Timer (V4) : 1 > > + RTC_STS valid on S4 wake (V4) : 0 > > + Remote Power-on capable (V4) : 0 > > + Use APIC Cluster Model (V4) : 1 > > + Use APIC Physical Destination Mode (V4) : 0 > > + Hardware Reduced (V5) : 0 > > + Low Power S0 Idle (V5) : 0 > > + > > +[074h 0116 12] Reset Register : [Generic Address Structure] > > +[074h 0116 1] Space ID : 01 [SystemIO] > > +[075h 0117 1] Bit Width : 08 > > +[076h 0118 1] Bit Offset : 00 > > +[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy] > > +[078h 0120 8] Address : 0000000000000CF9 > > + > > +[080h 0128 1] Value to cause reset : 0F > > +[081h 0129 2] ARM Flags (decoded below) : 0000 > > + PSCI Compliant : 0 > > + Must use HVC for PSCI : 0 > > + > > +[083h 0131 1] FADT Minor Revision : 00 > > +[084h 0132 8] FACS Address : 0000000000000000 > > +[08Ch 0140 8] DSDT Address : 0000000000000000 > > +[094h 0148 12] PM1A Event Block : [Generic Address Structure] > > +[094h 0148 1] Space ID : 01 [SystemIO] > > +[095h 0149 1] Bit Width : 20 > > +[096h 0150 1] Bit Offset : 00 > > +[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy] > > +[098h 0152 8] Address : 0000000000000600 > > + > > +[0A0h 0160 12] PM1B Event Block : [Generic Address Structure] > > +[0A0h 0160 1] Space ID : 00 [SystemMemory] > > +[0A1h 0161 1] Bit Width : 00 > > +[0A2h 0162 1] Bit Offset : 00 > > +[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy] > > +[0A4h 0164 8] Address : 0000000000000000 > > + > > +[0ACh 0172 12] PM1A Control Block : [Generic Address Structure] > > +[0ACh 0172 1] Space ID : 01 [SystemIO] > > +[0ADh 0173 1] Bit Width : 10 > > +[0AEh 0174 1] Bit Offset : 00 > > +[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy] > > +[0B0h 0176 8] Address : 0000000000000604 > > + > > +[0B8h 0184 12] PM1B Control Block : [Generic Address Structure] > > +[0B8h 0184 1] Space ID : 00 [SystemMemory] > > +[0B9h 0185 1] Bit Width : 00 > > +[0BAh 0186 1] Bit Offset : 00 > > +[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy] > > +[0BCh 0188 8] Address : 0000000000000000 > > + > > +[0C4h 0196 12] PM2 Control Block : [Generic Address Structure] > > +[0C4h 0196 1] Space ID : 00 [SystemMemory] > > +[0C5h 0197 1] Bit Width : 00 > > +[0C6h 0198 1] Bit Offset : 00 > > +[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy] > > +[0C8h 0200 8] Address : 0000000000000000 > > + > > +[0D0h 0208 12] PM Timer Block : [Generic Address Structure] > > +[0D0h 0208 1] Space ID : 01 [SystemIO] > > +[0D1h 0209 1] Bit Width : 20 > > +[0D2h 0210 1] Bit Offset : 00 > > +[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy] > > +[0D4h 0212 8] Address : 0000000000000608 > > + > > +[0DCh 0220 12] GPE0 Block : [Generic Address Structure] > > +[0DCh 0220 1] Space ID : 01 [SystemIO] > > +[0DDh 0221 1] Bit Width : 80 > > +[0DEh 0222 1] Bit Offset : 00 > > +[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy] > > +[0E0h 0224 8] Address : 0000000000000620 > > + > > +[0E8h 0232 12] GPE1 Block : [Generic Address Structure] > > +[0E8h 0232 1] Space ID : 00 [SystemMemory] > > +[0E9h 0233 1] Bit Width : 00 > > +[0EAh 0234 1] Bit Offset : 00 > > +[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy] > > +[0ECh 0236 8] Address : 0000000000000000 > > + > > ... > > > > APIC: > > > > +/* > > + * Intel ACPI Component Architecture > > + * AML/ASL+ Disassembler version 20200925 (64-bit version) > > + * Copyright (c) 2000 - 2020 Intel Corporation > > + * > > + * Disassembly of /tmp/aml-687791, Wed Aug 23 10:36:32 2023 > > + * > > + * ACPI Data Table [APIC] > > + * > > + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue > > + */ > > + > > +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] > > +[004h 0004 4] Table Length : 00000430 > > +[008h 0008 1] Revision : 03 > > +[009h 0009 1] Checksum : C5 > > +[00Ah 0010 6] Oem ID : "BOCHS " > > +[010h 0016 8] Oem Table ID : "BXPC " > > +[018h 0024 4] Oem Revision : 00000001 > > +[01Ch 0028 4] Asl Compiler ID : "BXPC" > > +[020h 0032 4] Asl Compiler Revision : 00000001 > > + > > +[024h 0036 4] Local Apic Address : FEE00000 > > +[028h 0040 4] Flags (decoded below) : 00000001 > > + PC-AT Compatibility : 1 > > + > > +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] > > +[02Dh 0045 1] Length : 08 > > +[02Eh 0046 1] Processor ID : 00 > > +[02Fh 0047 1] Local Apic ID : 00 > > +[030h 0048 4] Flags (decoded below) : 00000001 > > + Processor Enabled : 1 > > + Runtime Online Capable : 0 > > + > > +[034h 0052 1] Subtable Type : 00 [Processor Local APIC] > > +[035h 0053 1] Length : 08 > > +[036h 0054 1] Processor ID : 01 > > +[037h 0055 1] Local Apic ID : 01 > > +[038h 0056 4] Flags (decoded below) : 00000001 > > + Processor Enabled : 1 > > + Runtime Online Capable : 0 > > > > [snip] > > > > +[3E4h 0996 1] Subtable Type : 00 [Processor Local APIC] > > +[3E5h 0997 1] Length : 08 > > +[3E6h 0998 1] Processor ID : 77 > > +[3E7h 0999 1] Local Apic ID : 9E > > +[3E8h 1000 4] Flags (decoded below) : 00000000 > > + Processor Enabled : 0 > > + Runtime Online Capable : 0 > > + > > +[3ECh 1004 1] Subtable Type : 01 [I/O APIC] > > +[3EDh 1005 1] Length : 0C > > +[3EEh 1006 1] I/O Apic ID : 00 > > +[3EFh 1007 1] Reserved : 00 > > +[3F0h 1008 4] Address : FEC00000 > > +[3F4h 1012 4] Interrupt : 00000000 > > + > > +[3F8h 1016 1] Subtable Type : 02 [Interrupt Source Override] > > +[3F9h 1017 1] Length : 0A > > +[3FAh 1018 1] Bus : 00 > > +[3FBh 1019 1] Source : 00 > > +[3FCh 1020 4] Interrupt : 00000002 > > +[400h 1024 2] Flags (decoded below) : 0000 > > + Polarity : 0 > > + Trigger Mode : 0 > > + > > +[402h 1026 1] Subtable Type : 02 [Interrupt Source Override] > > +[403h 1027 1] Length : 0A > > +[404h 1028 1] Bus : 00 > > +[405h 1029 1] Source : 05 > > +[406h 1030 4] Interrupt : 00000005 > > +[40Ah 1034 2] Flags (decoded below) : 000D > > + Polarity : 1 > > + Trigger Mode : 3 > > + > > +[40Ch 1036 1] Subtable Type : 02 [Interrupt Source Override] > > +[40Dh 1037 1] Length : 0A > > +[40Eh 1038 1] Bus : 00 > > +[40Fh 1039 1] Source : 09 > > +[410h 1040 4] Interrupt : 00000009 > > +[414h 1044 2] Flags (decoded below) : 000D > > + Polarity : 1 > > + Trigger Mode : 3 > > + > > +[416h 1046 1] Subtable Type : 02 [Interrupt Source Override] > > +[417h 1047 1] Length : 0A > > +[418h 1048 1] Bus : 00 > > +[419h 1049 1] Source : 0A > > +[41Ah 1050 4] Interrupt : 0000000A > > +[41Eh 1054 2] Flags (decoded below) : 000D > > + Polarity : 1 > > + Trigger Mode : 3 > > + > > +[420h 1056 1] Subtable Type : 02 [Interrupt Source Override] > > +[421h 1057 1] Length : 0A > > +[422h 1058 1] Bus : 00 > > +[423h 1059 1] Source : 0B > > +[424h 1060 4] Interrupt : 0000000B > > +[428h 1064 2] Flags (decoded below) : 000D > > + Polarity : 1 > > + Trigger Mode : 3 > > + > > +[42Ah 1066 1] Subtable Type : 04 [Local APIC NMI] > > +[42Bh 1067 1] Length : 06 > > +[42Ch 1068 1] Processor ID : FF > > +[42Dh 1069 2] Flags (decoded below) : 0000 > > + Polarity : 0 > > + Trigger Mode : 0 > > +[42Fh 1071 1] Interrupt Input LINT : 01 > > + > > ... > > > > DSDT: > > > > +/* > > + * Intel ACPI Component Architecture > > + * AML/ASL+ Disassembler version 20200925 (64-bit version) > > + * Copyright (c) 2000 - 2020 Intel Corporation > > + * > > + * Disassembling to symbolic ASL+ operators > > + * > > + * Disassembly of /tmp/aml-8G8791, Wed Aug 23 10:36:32 2023 > > + * > > + * Original Table Header: > > + * Signature "DSDT" > > + * Length 0x0000489D (18589) > > + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support > > + * Checksum 0xDB > > + * OEM ID "BOCHS " > > + * OEM Table ID "BXPC " > > + * OEM Revision 0x00000001 (1) > > + * Compiler ID "BXPC" > > + * Compiler Version 0x00000001 (1) > > + */ > > +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) > > +{ > > + Scope (\) > > + { > > + OperationRegion (DBG, SystemIO, 0x0402, One) > > + Field (DBG, ByteAcc, NoLock, Preserve) > > + { > > + DBGB, 8 > > + } > > + > > + Method (DBUG, 1, NotSerialized) > > + { > > + ToHexString (Arg0, Local0) > > + ToBuffer (Local0, Local0) > > + Local1 = (SizeOf (Local0) - One) > > + Local2 = Zero > > + While ((Local2 < Local1)) > > + { > > + DBGB = DerefOf (Local0 [Local2]) > > + Local2++ > > + } > > + > > + DBGB = 0x0A > > + } > > + } > > + > > > > [snip] > > > > + > > + Processor (C000, 0x00, 0x00000000, 0x00) > > + { > > + Method (_STA, 0, Serialized) // _STA: Status > > + { > > + Return (CSTA (Zero)) > > + } > > + > > + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry > > + { > > + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ > > + }) > > + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication > > + { > > + COST (Zero, Arg0, Arg1, Arg2) > > + } > > + } > > + > > + Processor (C001, 0x01, 0x00000000, 0x00) > > + { > > + Method (_STA, 0, Serialized) // _STA: Status > > + { > > + Return (CSTA (One)) > > + } > > + > > + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry > > + { > > + 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........ > > + }) > > + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 > > + { > > + CEJ0 (One) > > + } > > + > > + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication > > + { > > + COST (One, Arg0, Arg1, Arg2) > > + } > > + } > > > > [snip] > > > > + Processor (C077, 0x77, 0x00000000, 0x00) > > + { > > + Method (_STA, 0, Serialized) // _STA: Status > > + { > > + Return (CSTA (0x77)) > > + } > > + > > + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry > > + { > > + 0x00, 0x08, 0x77, 0x9E, 0x01, 0x00, 0x00, 0x00 // ..w..... > > + }) > > + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 > > + { > > + CEJ0 (0x77) > > + } > > + > > + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication > > + { > > + COST (0x77, Arg0, Arg1, Arg2) > > + } > > + } > > + } > > + } > > + > > ... > > > > Signed-off-by: Zhao Liu <zhao1.liu@intel.com> > > --- > > tests/data/acpi/q35/APIC.type4-count | Bin 0 -> 1072 bytes > > tests/data/acpi/q35/DSDT.type4-count | Bin 0 -> 18589 bytes > > tests/data/acpi/q35/FACP.type4-count | Bin 0 -> 244 bytes > > tests/qtest/bios-tables-test-allowed-diff.h | 3 --- > > 4 files changed, 3 deletions(-) > > > > diff --git a/tests/data/acpi/q35/APIC.type4-count b/tests/data/acpi/q35/APIC.type4-count > > index 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b/tests/data/acpi/q35/FACP.type4-count > > index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..31fa5dd19c213034eef4eeefa6a04e61dadd8a2a 100644 > > GIT binary patch > > literal 244 > > zcmZ>BbPo8!z`($~*~#D8BUr&HBEVSz2pEB4AU24G0Y(N+hD|^Y6El!tgNU*~X%LSC > > z$X0-fGcm9T0LA|E|L2FOWMD92VqjR>!otAF!NBm72O<iWged~jj0!*k$y^{03>bk1 > > YBHITON2VDSAnpK(F*YFF1LDH~0O^Si0RR91 > > > > literal 0 > > HcmV?d00001 > > > > diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h > > index 0ce6f8fc72ee..dfb8523c8bf4 100644 > > --- a/tests/qtest/bios-tables-test-allowed-diff.h > > +++ b/tests/qtest/bios-tables-test-allowed-diff.h > > @@ -1,4 +1 @@ > > /* List of comma-separated changed AML files to ignore */ > > -"tests/data/acpi/q35/APIC.type4-count", > > -"tests/data/acpi/q35/DSDT.type4-count", > > -"tests/data/acpi/q35/FACP.type4-count", >
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