From patchwork Fri Sep 1 09:31:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiajie Chen X-Patchwork-Id: 13372320 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 65730CA0FE6 for ; Fri, 1 Sep 2023 09:37:02 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qc0XA-0004v1-6p; Fri, 01 Sep 2023 05:33:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qc0X4-0004tT-If for qemu-devel@nongnu.org; Fri, 01 Sep 2023 05:33:38 -0400 Received: from hognose1.porkbun.com ([35.82.102.206]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qc0X2-0000Vw-CF for qemu-devel@nongnu.org; Fri, 01 Sep 2023 05:33:38 -0400 Received: from ls3a6000.. (unknown [223.72.40.98]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) (Authenticated sender: c@jia.je) by hognose1.porkbun.com (Postfix) with ESMTPSA id ABAAA4446C; Fri, 1 Sep 2023 09:33:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jia.je; s=default; t=1693560815; bh=a73GfEeswoFW49d7u3KhdzVhsFQPnC+rr4/0EEEgT+0=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=M1kOXRd1IfjNzGV1Ff6pYrNKeGjq1GSPpPXv7YtWFEOvlqAwtgFAqz/SE196CRxBi 8JaZtD3iC1fzXKanloOn020FQ6AzuNFE7HkGA/BoP08PoXUD14O6jqHoIAQgX+Y3p7 wNPTD3FxVkjXqM9gC86nk2PumyWLbXippbVRiWrc= From: Jiajie Chen To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, gaosong@loongson.cn, git@xen0n.name, Jiajie Chen Subject: [PATCH v2 07/14] tcg/loongarch64: Lower mul_vec to vmul Date: Fri, 1 Sep 2023 17:31:00 +0800 Message-ID: <20230901093258.942357-8-c@jia.je> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230901093258.942357-1-c@jia.je> References: <20230901093258.942357-1-c@jia.je> MIME-Version: 1.0 Received-SPF: pass client-ip=35.82.102.206; envelope-from=c@jia.je; helo=hognose1.porkbun.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Jiajie Chen Reviewed-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 8 ++++++++ tcg/loongarch64/tcg-target.h | 2 +- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 16bcc2cf1b..07c030b262 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -1656,6 +1656,9 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, static const LoongArchInsn neg_vec_insn[4] = { OPC_VNEG_B, OPC_VNEG_H, OPC_VNEG_W, OPC_VNEG_D }; + static const LoongArchInsn mul_vec_insn[4] = { + OPC_VMUL_B, OPC_VMUL_H, OPC_VMUL_W, OPC_VMUL_D + }; a0 = args[0]; a1 = args[1]; @@ -1791,6 +1794,9 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, case INDEX_op_neg_vec: tcg_out32(s, encode_vdvj_insn(neg_vec_insn[vece], a0, a1)); break; + case INDEX_op_mul_vec: + tcg_out32(s, encode_vdvjvk_insn(mul_vec_insn[vece], a0, a1, a2)); + break; case INDEX_op_dupm_vec: tcg_out_dupm_vec(s, type, vece, a0, a1, a2); break; @@ -1817,6 +1823,7 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece) case INDEX_op_nor_vec: case INDEX_op_not_vec: case INDEX_op_neg_vec: + case INDEX_op_mul_vec: return 1; default: return 0; @@ -1991,6 +1998,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op) case INDEX_op_orc_vec: case INDEX_op_xor_vec: case INDEX_op_nor_vec: + case INDEX_op_mul_vec: return C_O1_I2(w, w, w); case INDEX_op_not_vec: diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h index c992c4b297..0880a2903d 100644 --- a/tcg/loongarch64/tcg-target.h +++ b/tcg/loongarch64/tcg-target.h @@ -183,7 +183,7 @@ extern bool use_lsx_instructions; #define TCG_TARGET_HAS_nand_vec 0 #define TCG_TARGET_HAS_nor_vec 1 #define TCG_TARGET_HAS_eqv_vec 0 -#define TCG_TARGET_HAS_mul_vec 0 +#define TCG_TARGET_HAS_mul_vec 1 #define TCG_TARGET_HAS_shi_vec 0 #define TCG_TARGET_HAS_shs_vec 0 #define TCG_TARGET_HAS_shv_vec 0