diff mbox series

[RFC,v1,4/8] Add enum with maximum ignored bits depending on privilege level for Zjpm v0.6.1

Message ID 20230908182640.1102270-5-baturo.alexey@gmail.com (mailing list archive)
State New, archived
Headers show
Series RISC-V Pointer Masking update to Zjpm v0.6.1 | expand

Commit Message

Alexey Baturo Sept. 8, 2023, 6:26 p.m. UTC 
Signed-off-by: Alexey Baturo <baturo.alexey@gmail.com>
---
 target/riscv/cpu.h | 10 ++++++++++
 1 file changed, 10 insertions(+)
diff mbox series

Patch

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 62dabfa207..25fe60476b 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -88,6 +88,16 @@  typedef enum {
     EXT_STATUS_DIRTY,
 } RISCVExtStatus;
 
+/* Enum holds maximum for N bits to be ignored depending on privilege level */
+typedef enum {
+    PM_BARE_N_BITS = 16,
+    PM_SV32_N_BITS = 0,
+    PM_SV39_N_BITS = 25,
+    PM_SV48_N_BITS = 16,
+    PM_SV57_N_BITS = 7,
+    PM_SV64_N_BITS = 0,
+} RISCVZjpmMaxNBits;
+
 #define MMU_USER_IDX 3
 
 #define MAX_RISCV_PMPS (16)