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Tue, 19 Sep 2023 10:58:03 -0700 (PDT) Date: Tue, 19 Sep 2023 17:57:24 +0000 In-Reply-To: <20230919175725.3413108-1-nabihestefan@google.com> Mime-Version: 1.0 References: <20230919175725.3413108-1-nabihestefan@google.com> X-Mailer: git-send-email 2.42.0.459.ge4e396fd5e-goog Message-ID: <20230919175725.3413108-14-nabihestefan@google.com> Subject: [PATCH 13/14] hw/arm: Connect to chardev backend for NPCM8XX From: Nabih Estefan To: peter.maydell@linaro.org Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, kfting@nuvoton.com, wuhaotsh@google.com, jasonwang@redhat.com, Avi.Fishman@nuvoton.com Received-SPF: pass client-ip=2607:f8b0:4864:20::b4a; envelope-from=3K-EJZQwKCkQtghonkyzklgtmuumrk.iuswks0-jk1krtutmt0.uxm@flex--nabihestefan.bounces.google.com; helo=mail-yb1-xb4a.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Tue, 19 Sep 2023 16:04:51 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Hao Wu As NPCM8XX SoCs have 2 mailboxes, we can't use -global to connect the mailboxes to their specific chardevs. So we add the search for chardev code here, similar to what we did for the GMAC devices. Signed-off-by: Hao Wu --- hw/arm/npcm8xx.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/hw/arm/npcm8xx.c b/hw/arm/npcm8xx.c index a9eb2b894c..8859cb274d 100644 --- a/hw/arm/npcm8xx.c +++ b/hw/arm/npcm8xx.c @@ -16,6 +16,7 @@ #include "qemu/osdep.h" +#include "chardev/char.h" #include "hw/arm/boot.h" #include "hw/arm/npcm8xx.h" #include "hw/char/serial.h" @@ -25,7 +26,9 @@ #include "hw/qdev-clock.h" #include "hw/qdev-properties.h" #include "qapi/error.h" +#include "qemu/error-report.h" #include "qemu/units.h" +#include "qom/object.h" #include "sysemu/sysemu.h" #define ARM_PHYS_TIMER_PPI 30 @@ -762,6 +765,14 @@ static void npcm8xx_realize(DeviceState *dev, Error **errp) /* PCI Mailbox. Cannot fail */ for (i = 0; i < ARRAY_SIZE(s->pci_mbox); i++) { + g_autofree char *char_name = g_strdup_printf("pci%d", i); + Chardev *chardev = qemu_chr_find(char_name); + + if (chardev) { + qdev_prop_set_chr(DEVICE(&s->pci_mbox[i]), "chardev", chardev); + } else { + warn_report("PCI Mailbox %d does not have a chardev backend.", i); + } sysbus_realize(SYS_BUS_DEVICE(&s->pci_mbox[i]), &error_abort); sysbus_mmio_map(SYS_BUS_DEVICE(&s->pci_mbox[i]), 0, npcm8xx_pci_mbox_addr[i]);