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[89.104.8.249]) by smtp.gmail.com with ESMTPSA id g27-20020a170906395b00b009ae587ce128sm2725823eje.216.2023.09.22.07.09.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Sep 2023 07:09:40 -0700 (PDT) From: Phil Dennis-Jordan To: qemu-devel@nongnu.org Cc: dirty@apple.com, rbolshakov@ddn.com, lists@philjordan.eu, Phil Dennis-Jordan Subject: [PATCH 1/3] i386: hvf: Adds support for INVTSC cpuid bit Date: Fri, 22 Sep 2023 16:09:12 +0200 Message-Id: <20230922140914.13906-2-phil@philjordan.eu> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230922140914.13906-1-phil@philjordan.eu> References: <20230922140914.13906-1-phil@philjordan.eu> MIME-Version: 1.0 Received-SPF: neutral client-ip=2a00:1450:4864:20::429; envelope-from=phil@philjordan.eu; helo=mail-wr1-x429.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NEUTRAL=0.779 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This patch adds the INVTSC bit to the Hypervisor.framework accelerator's CPUID bit passthrough allow-list. Previously, specifying +invtsc in the CPU configuration would fail with the following warning despite the host CPU advertising the feature: qemu-system-x86_64: warning: host doesn't support requested feature: CPUID.80000007H:EDX.invtsc [bit 8] x86 macOS itself relies on a fixed rate TSC for its own Mach absolute time timestamp mechanism, so there's no reason we can't enable this bit for guests. Signed-off-by: Phil Dennis-Jordan Reviewed-by: Roman Bolshakov Tested-by: Roman Bolshakov --- target/i386/hvf/x86_cpuid.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c index 7323a7a94b..d2721bd2a7 100644 --- a/target/i386/hvf/x86_cpuid.c +++ b/target/i386/hvf/x86_cpuid.c @@ -145,6 +145,10 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_OSVW | CPUID_EXT3_XOP | CPUID_EXT3_FMA4 | CPUID_EXT3_TBM; break; + case 0x80000007: + edx &= CPUID_APM_INVTSC; + eax = ebx = ecx = 0; + break; default: return 0; }