@@ -46,7 +46,7 @@ struct PIIXState {
#endif
uint64_t pic_levels;
- qemu_irq pic[ISA_NUM_IRQS];
+ qemu_irq isa_irqs_in[ISA_NUM_IRQS];
/* This member isn't used. Just for save/load compatibility */
int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS];
@@ -36,7 +36,7 @@
static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq)
{
- qemu_set_irq(piix3->pic[pic_irq],
+ qemu_set_irq(piix3->isa_irqs_in[pic_irq],
!!(piix3->pic_levels &
(((1ULL << PIIX_NUM_PIRQS) - 1) <<
(pic_irq * PIIX_NUM_PIRQS))));
@@ -312,7 +312,8 @@ static void pci_piix3_init(Object *obj)
{
PIIX3State *d = PIIX3_PCI_DEVICE(obj);
- qdev_init_gpio_out_named(DEVICE(obj), d->pic, "isa-irqs", ISA_NUM_IRQS);
+ qdev_init_gpio_out_named(DEVICE(obj), d->isa_irqs_in, "isa-irqs",
+ ISA_NUM_IRQS);
object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
}
TYPE_PIIX3_DEVICE doesn't instantiate a PIC since it relies on the board to do so. The "pic" attribute, however, suggests that there is one. Rename the attribute to reflect that it represents ISA interrupt lines. Use the same naming convention as in the VIA south bridges as well as in TYPE_I82378. Signed-off-by: Bernhard Beschow <shentey@gmail.com> --- include/hw/southbridge/piix.h | 2 +- hw/isa/piix3.c | 5 +++-- 2 files changed, 4 insertions(+), 3 deletions(-)