From patchwork Fri Nov 3 03:16:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13444292 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3812FC4332F for ; Fri, 3 Nov 2023 03:19:02 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qykh6-0008P1-AH; Thu, 02 Nov 2023 23:18:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qykh4-0008By-0z for qemu-devel@nongnu.org; Thu, 02 Nov 2023 23:17:58 -0400 Received: from mail-oo1-xc2d.google.com ([2607:f8b0:4864:20::c2d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qykh2-00046j-5Y for qemu-devel@nongnu.org; Thu, 02 Nov 2023 23:17:57 -0400 Received: by mail-oo1-xc2d.google.com with SMTP id 006d021491bc7-58441865ffaso887636eaf.1 for ; Thu, 02 Nov 2023 20:17:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698981475; x=1699586275; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BsgIu9p85jZ07rKaDYYcGl5EF2P5MOIWw3LEVA7+ZiY=; b=Bu0/AVpVMSMGUVtb7yDPzEQb3HDbf+AYdTvEq8+3wFboOHdZamKWyMQX5anzgBHgp8 sbCjZXc5nWLQiazRYpi/FZzIaCucWt+P9mpa52M7LofgLgOtwo4Ga4mq8KhWkO3o42F9 0Fvbh6/n95FI4gTigetAJDqvP5BTWik1oBMsgqpyasVvQVWiT1TprVWyw8I9zouOXOPY tcHb37iRySJJTsrc0VjHynpcfyv7R6kTwkP/kA+3OVNcsBkBBiQm9TBCci1jbEhyne2Q yizfRCBPwwafyApnje44+Wlr16mY8yWh9y6XqhvwWUEf7rHKujVOlcUk10A8IekigUhc TzZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698981475; x=1699586275; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BsgIu9p85jZ07rKaDYYcGl5EF2P5MOIWw3LEVA7+ZiY=; b=sOS3NqH1mzJIRj4h/I1rEHYCW2E5ldAkyo5kURFDNetPOw/j9ymrYWgU/2V027MdVV t5qurmncGGGTa19rfHH0GbIyZ62kyrmm6g8CYHWe21HWxTxCkoBcioFRUJEZUH8DmMEF nK6B7Ch8mu+0R9hFfSvHwShfCx7m9dQJkoBowIInts6Ri6knM7uvmVMkklu/H5LoTlJl lQTD1Wvn1f5FfjmEXSgMGs2H8XKyQ8SVX22V0Su6iSgIQ6Uabt49iNsbiYMNu2SrNN9c v0sL6pa3ePaWFZNk+X8wSwwRgYbeOtXs9sWqPxeejfoWbZsGtcUN1zV2Svy1xcxZ+Pl2 /O5g== X-Gm-Message-State: AOJu0YzN1p175hKhyi19TEEt/eeiR+u4WLNWyxEuIAqDtgFrtF8dKa0r Stj8vRWULadh/XJEa9S8tucv/A== X-Google-Smtp-Source: AGHT+IFrRJfeZ9FeNhy99IrXJC7DfVtCqQ+yrjFny+P9GyTiXX9k8T4g96xxDg3kh3F40xOKiREJXA== X-Received: by 2002:a05:6358:52cb:b0:169:7320:8265 with SMTP id z11-20020a05635852cb00b0016973208265mr17751040rwz.12.1698981474980; Thu, 02 Nov 2023 20:17:54 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.188.78]) by smtp.gmail.com with ESMTPSA id y17-20020a17090aca9100b0027cf4c554dasm499971pjt.11.2023.11.02.20.17.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Nov 2023 20:17:54 -0700 (PDT) From: Sunil V L To: qemu-arm@nongnu.org, qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Peter Maydell , Shannon Zhao , "Michael S . Tsirkin" , Igor Mammedov , Ani Sinha , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Gerd Hoffmann , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Anup Patel , Atish Kumar Patra , Haibo Xu , Sunil V L , Andrew Jones Subject: [PATCH v7 09/13] hw/riscv/virt-acpi-build.c: Add MMU node in RHCT Date: Fri, 3 Nov 2023 08:46:45 +0530 Message-Id: <20231103031649.2769834-10-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231103031649.2769834-1-sunilvl@ventanamicro.com> References: <20231103031649.2769834-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::c2d; envelope-from=sunilvl@ventanamicro.com; helo=mail-oo1-xc2d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org MMU type information is available via MMU node in RHCT. Add this node in RHCT. Signed-off-by: Sunil V L Reviewed-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones Acked-by: Alistair Francis Acked-by: Michael S. Tsirkin --- hw/riscv/virt-acpi-build.c | 36 +++++++++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c index 506d487ede..86c38f7c2b 100644 --- a/hw/riscv/virt-acpi-build.c +++ b/hw/riscv/virt-acpi-build.c @@ -152,6 +152,8 @@ static void build_rhct(GArray *table_data, size_t len, aligned_len; uint32_t isa_offset, num_rhct_nodes, cmo_offset = 0; RISCVCPU *cpu = &s->soc[0].harts[0]; + uint32_t mmu_offset = 0; + uint8_t satp_mode_max; char *isa; AcpiTable table = { .sig = "RHCT", .rev = 1, .oem_id = s->oem_id, @@ -171,6 +173,10 @@ static void build_rhct(GArray *table_data, num_rhct_nodes++; } + if (cpu->cfg.satp_mode.supported != 0) { + num_rhct_nodes++; + } + /* Number of RHCT nodes*/ build_append_int_noprefix(table_data, num_rhct_nodes, 4); @@ -226,6 +232,26 @@ static void build_rhct(GArray *table_data, } } + /* MMU node structure */ + if (cpu->cfg.satp_mode.supported != 0) { + satp_mode_max = satp_mode_max_from_map(cpu->cfg.satp_mode.map); + mmu_offset = table_data->len - table.table_offset; + build_append_int_noprefix(table_data, 2, 2); /* Type */ + build_append_int_noprefix(table_data, 8, 2); /* Length */ + build_append_int_noprefix(table_data, 0x1, 2); /* Revision */ + build_append_int_noprefix(table_data, 0, 1); /* Reserved */ + /* MMU Type */ + if (satp_mode_max == VM_1_10_SV57) { + build_append_int_noprefix(table_data, 2, 1); /* Sv57 */ + } else if (satp_mode_max == VM_1_10_SV48) { + build_append_int_noprefix(table_data, 1, 1); /* Sv48 */ + } else if (satp_mode_max == VM_1_10_SV39) { + build_append_int_noprefix(table_data, 0, 1); /* Sv39 */ + } else { + assert(1); + } + } + /* Hart Info Node */ for (int i = 0; i < arch_ids->len; i++) { len = 16; @@ -238,17 +264,25 @@ static void build_rhct(GArray *table_data, num_offsets++; } + if (mmu_offset) { + len += 4; + num_offsets++; + } + build_append_int_noprefix(table_data, len, 2); build_append_int_noprefix(table_data, 0x1, 2); /* Revision */ /* Number of offsets */ build_append_int_noprefix(table_data, num_offsets, 2); build_append_int_noprefix(table_data, i, 4); /* ACPI Processor UID */ - /* Offsets */ build_append_int_noprefix(table_data, isa_offset, 4); if (cmo_offset) { build_append_int_noprefix(table_data, cmo_offset, 4); } + + if (mmu_offset) { + build_append_int_noprefix(table_data, mmu_offset, 4); + } } acpi_table_end(linker, &table);