From patchwork Fri Nov 3 03:16:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13444302 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BF08FC4332F for ; Fri, 3 Nov 2023 03:20:21 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qykhV-000130-0O; Thu, 02 Nov 2023 23:18:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qykhT-0000we-2J for qemu-devel@nongnu.org; Thu, 02 Nov 2023 23:18:23 -0400 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qykhR-0004bK-5r for qemu-devel@nongnu.org; Thu, 02 Nov 2023 23:18:22 -0400 Received: by mail-pj1-x102f.google.com with SMTP id 98e67ed59e1d1-2800bb246ceso1446896a91.1 for ; Thu, 02 Nov 2023 20:18:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1698981499; x=1699586299; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kEJDi666XlkLe9PxXC5wqKzUtJirne5zNNBfjCv1MRg=; b=jpR7PIRBU4eEUtIYEGwPlWW6sWScules6WHwecnGVz0rd5LuSHo4oKTU+xEYkXkpmw VN1heWTH0l7bO3dSZgmVpv2uG/rlI6rU+WPmVEsOMz+Lbwn/y6yyHMfj3QjF9u8wFiha PTBF5nOK7Rc/nVcvPMiea7t4R3+SmBzbUHWqiwTA03gleVerP3iZCVg765Xkg7PUdRG0 CgNAR/EMtJ1EEvChdttlHs/w9NMMT319EI4WJ4h3kG72e+Ly49xSzpY61bN34Hi/npO0 c5Izw04xDPQuq06b4FJBLPyNjmoUjx3t7+UeTwRhq9xnQ8aS8mJQTxHLbrL3s1tybe/M vPGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698981499; x=1699586299; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kEJDi666XlkLe9PxXC5wqKzUtJirne5zNNBfjCv1MRg=; b=WFqD4URHv72BGSJwX+Q0BXtfyJmU959CGl496tR4cdOeLDHnxaWC/954uNmAzDr4P+ xUNnJe6/cPbAF9uPfbWW1VT10A6DFaIM1ZZevmVL3K8Q2YK7AR/Bpd1XTxdC/KaFx18P 0yl95WZhRRy7EL6hv1OwEdh1LkllvUkr3hXRXUnd2JjRKg/+0L7gPRMuzWaQZ8fBchSi ZKOndEYTiWU9iwnXO0QSD4tkFKDDUgoIYKu1xKGWq2YFIyPcG9umZGAm/elQ/M2zX731 qz9j+rjA3yXJ/C8WwQj1Uthua9n6fF9Dsk/tjptNHgmaCNApsJbQ4ChbsQ6m+u8rltnt Yo6Q== X-Gm-Message-State: AOJu0YwqhIX3+vahN8lDSAJAXh8kZVVJLMCe6sfwRclMtu+J8BpGh+kM Y75Y2IHQTlBKo+Guk4naGqgRxQ== X-Google-Smtp-Source: AGHT+IFdPQZz780k2MpuWm4YetM5YtWadhaAKsrGuvixrYQWkuw+n0Dewh5f5XTNqPKryhlUU1OZIg== X-Received: by 2002:a17:90a:348d:b0:27d:1334:d266 with SMTP id p13-20020a17090a348d00b0027d1334d266mr15296304pjb.27.1698981499024; Thu, 02 Nov 2023 20:18:19 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.188.78]) by smtp.gmail.com with ESMTPSA id y17-20020a17090aca9100b0027cf4c554dasm499971pjt.11.2023.11.02.20.18.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Nov 2023 20:18:18 -0700 (PDT) From: Sunil V L To: qemu-arm@nongnu.org, qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Peter Maydell , Shannon Zhao , "Michael S . Tsirkin" , Igor Mammedov , Ani Sinha , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Gerd Hoffmann , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Anup Patel , Atish Kumar Patra , Haibo Xu , Sunil V L , Andrew Jones Subject: [PATCH v7 13/13] hw/riscv/virt-acpi-build.c: Add PLIC in MADT Date: Fri, 3 Nov 2023 08:46:49 +0530 Message-Id: <20231103031649.2769834-14-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231103031649.2769834-1-sunilvl@ventanamicro.com> References: <20231103031649.2769834-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=sunilvl@ventanamicro.com; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add PLIC structures for each socket in the MADT when system is configured with PLIC as the external interrupt controller. Signed-off-by: Haibo Xu Signed-off-by: Sunil V L Reviewed-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones Acked-by: Alistair Francis Acked-by: Michael S. Tsirkin --- hw/riscv/virt-acpi-build.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c index 4d03a27efd..d4a02579d6 100644 --- a/hw/riscv/virt-acpi-build.c +++ b/hw/riscv/virt-acpi-build.c @@ -94,6 +94,12 @@ static void riscv_acpi_madt_add_rintc(uint32_t uid, arch_ids->cpus[uid].props.node_id, local_cpu_id), 4); + } else if (s->aia_type == VIRT_AIA_TYPE_NONE) { + build_append_int_noprefix(entry, + ACPI_BUILD_INTC_ID( + arch_ids->cpus[uid].props.node_id, + 2 * local_cpu_id + 1), + 4); } else { build_append_int_noprefix(entry, 0, 4); } @@ -494,6 +500,29 @@ static void build_madt(GArray *table_data, build_append_int_noprefix(table_data, s->memmap[VIRT_APLIC_S].size, 4); } + } else { + /* PLICs */ + for (socket = 0; socket < riscv_socket_count(ms); socket++) { + aplic_addr = s->memmap[VIRT_PLIC].base + + s->memmap[VIRT_PLIC].size * socket; + gsi_base = VIRT_IRQCHIP_NUM_SOURCES * socket; + build_append_int_noprefix(table_data, 0x1B, 1); /* Type */ + build_append_int_noprefix(table_data, 36, 1); /* Length */ + build_append_int_noprefix(table_data, 1, 1); /* Version */ + build_append_int_noprefix(table_data, socket, 1); /* PLIC ID */ + build_append_int_noprefix(table_data, 0, 8); /* Hardware ID */ + /* Total External Interrupt Sources Supported */ + build_append_int_noprefix(table_data, + VIRT_IRQCHIP_NUM_SOURCES - 1, 2); + build_append_int_noprefix(table_data, 0, 2); /* Max Priority */ + build_append_int_noprefix(table_data, 0, 4); /* Flags */ + /* PLIC Size */ + build_append_int_noprefix(table_data, s->memmap[VIRT_PLIC].size, 4); + /* PLIC Address */ + build_append_int_noprefix(table_data, aplic_addr, 8); + /* Global System Interrupt Vector Base */ + build_append_int_noprefix(table_data, gsi_base, 4); + } } acpi_table_end(linker, &table);