diff mbox series

[v5,21/31] target/xtensa: Use generic cpu_list()

Message ID 20231114235628.534334-22-gshan@redhat.com (mailing list archive)
State New, archived
Headers show
Series Unified CPU type check | expand

Commit Message

Gavin Shan Nov. 14, 2023, 11:56 p.m. UTC
Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
Available CPUs:
  test_mmuhifi_c3
  sample_controller
  lx106
  dsp3400
  de233_fpu
  de212
  dc233c
  dc232b

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
Available CPUs:
  dc232b
  dc233c
  de212
  de233_fpu
  dsp3400
  lx106
  sample_controller
  test_mmuhifi_c3

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/xtensa/cpu.h          | 10 +---------
 target/xtensa/helper.c       | 19 +++----------------
 target/xtensa/overlay_tool.h |  7 ++-----
 3 files changed, 6 insertions(+), 30 deletions(-)

Comments

Richard Henderson Nov. 15, 2023, 1:12 a.m. UTC | #1
On 11/14/23 15:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
> Available CPUs:
>    test_mmuhifi_c3
>    sample_controller
>    lx106
>    dsp3400
>    de233_fpu
>    de212
>    dc233c
>    dc232b
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
> Available CPUs:
>    dc232b
>    dc233c
>    de212
>    de233_fpu
>    dsp3400
>    lx106
>    sample_controller
>    test_mmuhifi_c3
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/xtensa/cpu.h          | 10 +---------
>   target/xtensa/helper.c       | 19 +++----------------
>   target/xtensa/overlay_tool.h |  7 ++-----
>   3 files changed, 6 insertions(+), 30 deletions(-)
> 
> diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
> index dd81729306..ffeb1ca43f 100644
> --- a/target/xtensa/cpu.h
> +++ b/target/xtensa/cpu.h
> @@ -491,11 +491,6 @@ typedef struct XtensaConfig {
>       bool use_first_nan;
>   } XtensaConfig;
>   
> -typedef struct XtensaConfigList {
> -    const XtensaConfig *config;
> -    struct XtensaConfigList *next;
> -} XtensaConfigList;
> -
>   #if HOST_BIG_ENDIAN
>   enum {
>       FP_F32_HIGH,
> @@ -600,8 +595,6 @@ G_NORETURN void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
>                                                  MMUAccessType access_type, int mmu_idx,
>                                                  uintptr_t retaddr);
>   
> -#define cpu_list xtensa_cpu_list
> -
>   #define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
>   
>   #if TARGET_BIG_ENDIAN
> @@ -620,13 +613,12 @@ void xtensa_collect_sr_names(const XtensaConfig *config);
>   void xtensa_translate_init(void);
>   void **xtensa_get_regfile_by_name(const char *name, int entries, int bits);
>   void xtensa_breakpoint_handler(CPUState *cs);
> -void xtensa_register_core(XtensaConfigList *node);
> +void xtensa_register_core(XtensaConfig *config);
>   void xtensa_sim_open_console(Chardev *chr);
>   void check_interrupts(CPUXtensaState *s);
>   void xtensa_irq_init(CPUXtensaState *env);
>   qemu_irq *xtensa_get_extints(CPUXtensaState *env);
>   qemu_irq xtensa_get_runstall(CPUXtensaState *env);
> -void xtensa_cpu_list(void);
>   void xtensa_sync_window_from_phys(CPUXtensaState *env);
>   void xtensa_sync_phys_from_window(CPUXtensaState *env);
>   void xtensa_rotate_window(CPUXtensaState *env, uint32_t delta);
> diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
> index dbeb97a953..3654739b09 100644
> --- a/target/xtensa/helper.c
> +++ b/target/xtensa/helper.c
> @@ -35,8 +35,6 @@
>   #include "qemu/qemu-print.h"
>   #include "qemu/host-utils.h"
>   
> -static struct XtensaConfigList *xtensa_cores;
> -
>   static void add_translator_to_hash(GHashTable *translator,
>                                      const char *name,
>                                      const XtensaOpcodeOps *opcode)
> @@ -187,17 +185,15 @@ static void xtensa_core_class_init(ObjectClass *oc, void *data)
>       cc->gdb_num_core_regs = config->gdb_regmap.num_regs;
>   }
>   
> -void xtensa_register_core(XtensaConfigList *node)
> +void xtensa_register_core(XtensaConfig *config)
>   {
>       TypeInfo type = {
>           .parent = TYPE_XTENSA_CPU,
>           .class_init = xtensa_core_class_init,
> -        .class_data = (void *)node->config,
> +        .class_data = (void *)config,
>       };

This patch does two things and should be split.


r~
Philippe Mathieu-Daudé Nov. 16, 2023, 1:29 p.m. UTC | #2
On 15/11/23 02:12, Richard Henderson wrote:
> On 11/14/23 15:56, Gavin Shan wrote:
>> Before it's applied:
>>
>> [gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
>> Available CPUs:
>>    test_mmuhifi_c3
>>    sample_controller
>>    lx106
>>    dsp3400
>>    de233_fpu
>>    de212
>>    dc233c
>>    dc232b
>>
>> After it's applied:
>>
>> [gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
>> Available CPUs:
>>    dc232b
>>    dc233c
>>    de212
>>    de233_fpu
>>    dsp3400
>>    lx106
>>    sample_controller
>>    test_mmuhifi_c3
>>
>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>> ---
>>   target/xtensa/cpu.h          | 10 +---------
>>   target/xtensa/helper.c       | 19 +++----------------
>>   target/xtensa/overlay_tool.h |  7 ++-----
>>   3 files changed, 6 insertions(+), 30 deletions(-)
>>
>> diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
>> index dd81729306..ffeb1ca43f 100644
>> --- a/target/xtensa/cpu.h
>> +++ b/target/xtensa/cpu.h
>> @@ -491,11 +491,6 @@ typedef struct XtensaConfig {
>>       bool use_first_nan;
>>   } XtensaConfig;
>> -typedef struct XtensaConfigList {
>> -    const XtensaConfig *config;
>> -    struct XtensaConfigList *next;
>> -} XtensaConfigList;
>> -
>>   #if HOST_BIG_ENDIAN
>>   enum {
>>       FP_F32_HIGH,
>> @@ -600,8 +595,6 @@ G_NORETURN void 
>> xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
>>                                                  MMUAccessType 
>> access_type, int mmu_idx,
>>                                                  uintptr_t retaddr);
>> -#define cpu_list xtensa_cpu_list
>> -
>>   #define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
>>   #if TARGET_BIG_ENDIAN
>> @@ -620,13 +613,12 @@ void xtensa_collect_sr_names(const XtensaConfig 
>> *config);
>>   void xtensa_translate_init(void);
>>   void **xtensa_get_regfile_by_name(const char *name, int entries, int 
>> bits);
>>   void xtensa_breakpoint_handler(CPUState *cs);
>> -void xtensa_register_core(XtensaConfigList *node);
>> +void xtensa_register_core(XtensaConfig *config);
>>   void xtensa_sim_open_console(Chardev *chr);
>>   void check_interrupts(CPUXtensaState *s);
>>   void xtensa_irq_init(CPUXtensaState *env);
>>   qemu_irq *xtensa_get_extints(CPUXtensaState *env);
>>   qemu_irq xtensa_get_runstall(CPUXtensaState *env);
>> -void xtensa_cpu_list(void);
>>   void xtensa_sync_window_from_phys(CPUXtensaState *env);
>>   void xtensa_sync_phys_from_window(CPUXtensaState *env);
>>   void xtensa_rotate_window(CPUXtensaState *env, uint32_t delta);
>> diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
>> index dbeb97a953..3654739b09 100644
>> --- a/target/xtensa/helper.c
>> +++ b/target/xtensa/helper.c
>> @@ -35,8 +35,6 @@
>>   #include "qemu/qemu-print.h"
>>   #include "qemu/host-utils.h"
>> -static struct XtensaConfigList *xtensa_cores;
>> -
>>   static void add_translator_to_hash(GHashTable *translator,
>>                                      const char *name,
>>                                      const XtensaOpcodeOps *opcode)
>> @@ -187,17 +185,15 @@ static void xtensa_core_class_init(ObjectClass 
>> *oc, void *data)
>>       cc->gdb_num_core_regs = config->gdb_regmap.num_regs;
>>   }
>> -void xtensa_register_core(XtensaConfigList *node)
>> +void xtensa_register_core(XtensaConfig *config)
>>   {
>>       TypeInfo type = {
>>           .parent = TYPE_XTENSA_CPU,
>>           .class_init = xtensa_core_class_init,
>> -        .class_data = (void *)node->config,
>> +        .class_data = (void *)config,
>>       };
> 
> This patch does two things and should be split.

I'm doing the split. This patch becomes:

-- >8 --
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index dd81729306..d9c49a35fa 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -600,8 +600,6 @@ G_NORETURN void 
xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
                                                 MMUAccessType 
access_type, int mmu_idx,
                                                 uintptr_t retaddr);

-#define cpu_list xtensa_cpu_list
-
  #define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU

  #if TARGET_BIG_ENDIAN
@@ -626,7 +624,6 @@ void check_interrupts(CPUXtensaState *s);
  void xtensa_irq_init(CPUXtensaState *env);
  qemu_irq *xtensa_get_extints(CPUXtensaState *env);
  qemu_irq xtensa_get_runstall(CPUXtensaState *env);
-void xtensa_cpu_list(void);
  void xtensa_sync_window_from_phys(CPUXtensaState *env);
  void xtensa_sync_phys_from_window(CPUXtensaState *env);
  void xtensa_rotate_window(CPUXtensaState *env, uint32_t delta);
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index dbeb97a953..f6632df646 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -234,15 +234,6 @@ void xtensa_breakpoint_handler(CPUState *cs)
      }
  }

-void xtensa_cpu_list(void)
-{
-    XtensaConfigList *core = xtensa_cores;
-    qemu_printf("Available CPUs:\n");
-    for (; core; core = core->next) {
-        qemu_printf("  %s\n", core->config->name);
-    }
-}
-
  #ifndef CONFIG_USER_ONLY
  void xtensa_cpu_do_unaligned_access(CPUState *cs,
                                      vaddr addr, MMUAccessType access_type,
---

What is left is:

-- >8 --
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index d9c49a35fa..ffeb1ca43f 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -491,11 +491,6 @@ typedef struct XtensaConfig {
      bool use_first_nan;
  } XtensaConfig;

-typedef struct XtensaConfigList {
-    const XtensaConfig *config;
-    struct XtensaConfigList *next;
-} XtensaConfigList;
-
  #if HOST_BIG_ENDIAN
  enum {
      FP_F32_HIGH,
@@ -618,7 +613,7 @@ void xtensa_collect_sr_names(const XtensaConfig 
*config);
  void xtensa_translate_init(void);
  void **xtensa_get_regfile_by_name(const char *name, int entries, int 
bits);
  void xtensa_breakpoint_handler(CPUState *cs);
-void xtensa_register_core(XtensaConfigList *node);
+void xtensa_register_core(XtensaConfig *config);
  void xtensa_sim_open_console(Chardev *chr);
  void check_interrupts(CPUXtensaState *s);
  void xtensa_irq_init(CPUXtensaState *env);
diff --git a/target/xtensa/overlay_tool.h b/target/xtensa/overlay_tool.h
index 701c00eed2..7373ba7592 100644
--- a/target/xtensa/overlay_tool.h
+++ b/target/xtensa/overlay_tool.h
@@ -450,13 +450,10 @@
  #endif

  #if TARGET_BIG_ENDIAN == (XCHAL_HAVE_BE != 0)
-#define REGISTER_CORE(core) \
+#define REGISTER_CORE(config) \
      static void __attribute__((constructor)) register_core(void) \
      { \
-        static XtensaConfigList node = { \
-            .config = &core, \
-        }; \
-        xtensa_register_core(&node); \
+        xtensa_register_core(&config); \
      }
  #else
  #define REGISTER_CORE(core)
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index f6632df646..3654739b09 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -35,8 +35,6 @@
  #include "qemu/qemu-print.h"
  #include "qemu/host-utils.h"

-static struct XtensaConfigList *xtensa_cores;
-
  static void add_translator_to_hash(GHashTable *translator,
                                     const char *name,
                                     const XtensaOpcodeOps *opcode)
@@ -187,17 +185,15 @@ static void xtensa_core_class_init(ObjectClass 
*oc, void *data)
      cc->gdb_num_core_regs = config->gdb_regmap.num_regs;
  }

-void xtensa_register_core(XtensaConfigList *node)
+void xtensa_register_core(XtensaConfig *config)
  {
      TypeInfo type = {
          .parent = TYPE_XTENSA_CPU,
          .class_init = xtensa_core_class_init,
-        .class_data = (void *)node->config,
+        .class_data = (void *)config,
      };

-    node->next = xtensa_cores;
-    xtensa_cores = node;
-    type.name = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), 
node->config->name);
+    type.name = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), config->name);
      type_register(&type);
      g_free((gpointer)type.name);
  }
---

Which I will skip for now unless Max Ack-by it, since as per commit
ac8b7db493 ("target-xtensa: extract core configuration from overlay")
this might be used externally by the overlay tool generator.

Regards,

Phil.
diff mbox series

Patch

diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index dd81729306..ffeb1ca43f 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -491,11 +491,6 @@  typedef struct XtensaConfig {
     bool use_first_nan;
 } XtensaConfig;
 
-typedef struct XtensaConfigList {
-    const XtensaConfig *config;
-    struct XtensaConfigList *next;
-} XtensaConfigList;
-
 #if HOST_BIG_ENDIAN
 enum {
     FP_F32_HIGH,
@@ -600,8 +595,6 @@  G_NORETURN void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
                                                MMUAccessType access_type, int mmu_idx,
                                                uintptr_t retaddr);
 
-#define cpu_list xtensa_cpu_list
-
 #define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
 
 #if TARGET_BIG_ENDIAN
@@ -620,13 +613,12 @@  void xtensa_collect_sr_names(const XtensaConfig *config);
 void xtensa_translate_init(void);
 void **xtensa_get_regfile_by_name(const char *name, int entries, int bits);
 void xtensa_breakpoint_handler(CPUState *cs);
-void xtensa_register_core(XtensaConfigList *node);
+void xtensa_register_core(XtensaConfig *config);
 void xtensa_sim_open_console(Chardev *chr);
 void check_interrupts(CPUXtensaState *s);
 void xtensa_irq_init(CPUXtensaState *env);
 qemu_irq *xtensa_get_extints(CPUXtensaState *env);
 qemu_irq xtensa_get_runstall(CPUXtensaState *env);
-void xtensa_cpu_list(void);
 void xtensa_sync_window_from_phys(CPUXtensaState *env);
 void xtensa_sync_phys_from_window(CPUXtensaState *env);
 void xtensa_rotate_window(CPUXtensaState *env, uint32_t delta);
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index dbeb97a953..3654739b09 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -35,8 +35,6 @@ 
 #include "qemu/qemu-print.h"
 #include "qemu/host-utils.h"
 
-static struct XtensaConfigList *xtensa_cores;
-
 static void add_translator_to_hash(GHashTable *translator,
                                    const char *name,
                                    const XtensaOpcodeOps *opcode)
@@ -187,17 +185,15 @@  static void xtensa_core_class_init(ObjectClass *oc, void *data)
     cc->gdb_num_core_regs = config->gdb_regmap.num_regs;
 }
 
-void xtensa_register_core(XtensaConfigList *node)
+void xtensa_register_core(XtensaConfig *config)
 {
     TypeInfo type = {
         .parent = TYPE_XTENSA_CPU,
         .class_init = xtensa_core_class_init,
-        .class_data = (void *)node->config,
+        .class_data = (void *)config,
     };
 
-    node->next = xtensa_cores;
-    xtensa_cores = node;
-    type.name = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), node->config->name);
+    type.name = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), config->name);
     type_register(&type);
     g_free((gpointer)type.name);
 }
@@ -234,15 +230,6 @@  void xtensa_breakpoint_handler(CPUState *cs)
     }
 }
 
-void xtensa_cpu_list(void)
-{
-    XtensaConfigList *core = xtensa_cores;
-    qemu_printf("Available CPUs:\n");
-    for (; core; core = core->next) {
-        qemu_printf("  %s\n", core->config->name);
-    }
-}
-
 #ifndef CONFIG_USER_ONLY
 void xtensa_cpu_do_unaligned_access(CPUState *cs,
                                     vaddr addr, MMUAccessType access_type,
diff --git a/target/xtensa/overlay_tool.h b/target/xtensa/overlay_tool.h
index 701c00eed2..7373ba7592 100644
--- a/target/xtensa/overlay_tool.h
+++ b/target/xtensa/overlay_tool.h
@@ -450,13 +450,10 @@ 
 #endif
 
 #if TARGET_BIG_ENDIAN == (XCHAL_HAVE_BE != 0)
-#define REGISTER_CORE(core) \
+#define REGISTER_CORE(config) \
     static void __attribute__((constructor)) register_core(void) \
     { \
-        static XtensaConfigList node = { \
-            .config = &core, \
-        }; \
-        xtensa_register_core(&node); \
+        xtensa_register_core(&config); \
     }
 #else
 #define REGISTER_CORE(core)