@@ -281,3 +281,16 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
crs_range_set_free(&crs_range_set);
}
+
+void acpi_dsdt_add_gpex_host(Aml *scope, uint32_t irq)
+{
+ bool ambig;
+ Object *obj = object_resolve_path_type("", TYPE_GPEX_HOST, &ambig);
+
+ if (!obj || ambig) {
+ return;
+ }
+
+ GPEX_HOST(obj)->gpex_cfg.irq = irq;
+ acpi_dsdt_add_gpex(scope, &GPEX_HOST(obj)->gpex_cfg);
+}
@@ -154,6 +154,18 @@ static Property gpex_host_properties[] = {
*/
DEFINE_PROP_BOOL("allow-unmapped-accesses", GPEXHost,
allow_unmapped_accesses, true),
+ DEFINE_PROP_UINT64(PCI_HOST_ECAM_BASE, GPEXHost, gpex_cfg.ecam.base, 0),
+ DEFINE_PROP_SIZE(PCI_HOST_ECAM_SIZE, GPEXHost, gpex_cfg.ecam.size, 0),
+ DEFINE_PROP_UINT64(PCI_HOST_PIO_BASE, GPEXHost, gpex_cfg.pio.base, 0),
+ DEFINE_PROP_SIZE(PCI_HOST_PIO_SIZE, GPEXHost, gpex_cfg.pio.size, 0),
+ DEFINE_PROP_UINT64(PCI_HOST_BELOW_4G_MMIO_BASE, GPEXHost,
+ gpex_cfg.mmio32.base, 0),
+ DEFINE_PROP_SIZE(PCI_HOST_BELOW_4G_MMIO_SIZE, GPEXHost,
+ gpex_cfg.mmio32.size, 0),
+ DEFINE_PROP_UINT64(PCI_HOST_ABOVE_4G_MMIO_BASE, GPEXHost,
+ gpex_cfg.mmio64.base, 0),
+ DEFINE_PROP_SIZE(PCI_HOST_ABOVE_4G_MMIO_SIZE, GPEXHost,
+ gpex_cfg.mmio64.size, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -40,6 +40,15 @@ struct GPEXRootState {
/*< public >*/
};
+struct GPEXConfig {
+ MemMapEntry ecam;
+ MemMapEntry mmio32;
+ MemMapEntry mmio64;
+ MemMapEntry pio;
+ int irq;
+ PCIBus *bus;
+};
+
struct GPEXHost {
/*< private >*/
PCIExpressHost parent_obj;
@@ -55,19 +64,22 @@ struct GPEXHost {
int irq_num[GPEX_NUM_IRQS];
bool allow_unmapped_accesses;
-};
-struct GPEXConfig {
- MemMapEntry ecam;
- MemMapEntry mmio32;
- MemMapEntry mmio64;
- MemMapEntry pio;
- int irq;
- PCIBus *bus;
+ struct GPEXConfig gpex_cfg;
};
int gpex_set_irq_num(GPEXHost *s, int index, int gsi);
void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg);
+void acpi_dsdt_add_gpex_host(Aml *scope, uint32_t irq);
+
+#define PCI_HOST_PIO_BASE "x-pio-base"
+#define PCI_HOST_PIO_SIZE "x-pio-size"
+#define PCI_HOST_ECAM_BASE "x-ecam-base"
+#define PCI_HOST_ECAM_SIZE "x-ecam-size"
+#define PCI_HOST_BELOW_4G_MMIO_BASE "x-below-4g-mmio-base"
+#define PCI_HOST_BELOW_4G_MMIO_SIZE "x-below-4g-mmio-size"
+#define PCI_HOST_ABOVE_4G_MMIO_BASE "x-above-4g-mmio-base"
+#define PCI_HOST_ABOVE_4G_MMIO_SIZE "x-above-4g-mmio-size"
#endif /* HW_GPEX_H */