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(pd95ed842.dip0.t-ipconnect.de. [217.94.216.66]) by smtp.gmail.com with ESMTPSA id t25-20020a056402241900b00553b6b5bb44sm1264264eda.67.2023.12.21.07.08.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Dec 2023 07:08:12 -0800 (PST) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Juan Quintela , =?utf-8?q?Herv=C3=A9_Poussineau?= , Hanna Reitz , Fabiano Rosas , Paolo Bonzini , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Mark Cave-Ayland , Aleksandar Rikalo , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , Eduardo Habkost , Thomas Huth , Peter Xu , Jiaxun Yang , qemu-ppc@nongnu.org, Kevin Wolf , =?utf-8?b?RnLDqWTDqXJp?= =?utf-8?b?YyBCYXJyYXQ=?= , Sergio Lopez , John Snow , Artyom Tarasenko , David Hildenbrand , Nicholas Piggin , Marcel Apfelbaum , BALATON Zoltan , qemu-block@nongnu.org, Richard Henderson , Leonardo Bras , "Michael S. Tsirkin" , Bernhard Beschow Subject: [PATCH v3 07/11] hw/block/fdc-isa: Implement relocation and enabling/disabling for TYPE_ISA_FDC Date: Thu, 21 Dec 2023 16:07:46 +0100 Message-ID: <20231221150750.5435-8-shentey@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231221150750.5435-1-shentey@gmail.com> References: <20231221150750.5435-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22a; envelope-from=shentey@gmail.com; helo=mail-lj1-x22a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The real SuperI/O chips emulated by QEMU allow for relocating and enabling or disabling their SuperI/O functions via software. So far this is not implemented. Prepare for that by adding isa_fdc_set_{enabled,iobase}. Signed-off-by: Bernhard Beschow --- include/hw/block/fdc.h | 3 +++ hw/block/fdc-isa.c | 14 ++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/include/hw/block/fdc.h b/include/hw/block/fdc.h index 35248c0837..c367c5efea 100644 --- a/include/hw/block/fdc.h +++ b/include/hw/block/fdc.h @@ -14,6 +14,9 @@ void fdctrl_init_sysbus(qemu_irq irq, hwaddr mmio_base, DriveInfo **fds); void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base, DriveInfo **fds, qemu_irq *fdc_tc); +void isa_fdc_set_iobase(ISADevice *fdc, hwaddr iobase); +void isa_fdc_set_enabled(ISADevice *fdc, bool enabled); + FloppyDriveType isa_fdc_get_drive_type(ISADevice *fdc, int i); int cmos_get_fd_drive_type(FloppyDriveType fd0); diff --git a/hw/block/fdc-isa.c b/hw/block/fdc-isa.c index b4c92b40b3..c989325de3 100644 --- a/hw/block/fdc-isa.c +++ b/hw/block/fdc-isa.c @@ -192,6 +192,20 @@ static Aml *build_fdinfo_aml(int idx, FloppyDriveType type) return dev; } +void isa_fdc_set_iobase(ISADevice *fdc, hwaddr iobase) +{ + FDCtrlISABus *isa = ISA_FDC(fdc); + + fdc->ioport_id = iobase; + isa->iobase = iobase; + portio_list_set_address(&isa->portio_list, isa->iobase); +} + +void isa_fdc_set_enabled(ISADevice *fdc, bool enabled) +{ + portio_list_set_enabled(&ISA_FDC(fdc)->portio_list, enabled); +} + int cmos_get_fd_drive_type(FloppyDriveType fd0) { int val;