From patchwork Thu Dec 21 17:51:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13502483 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 048ABC35274 for ; Thu, 21 Dec 2023 17:54:48 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rGNDu-0003FS-6P; Thu, 21 Dec 2023 12:52:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rGNDr-0003Eo-W8 for qemu-devel@nongnu.org; Thu, 21 Dec 2023 12:52:40 -0500 Received: from mail-il1-x12e.google.com ([2607:f8b0:4864:20::12e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rGNDn-00082U-CK for qemu-devel@nongnu.org; Thu, 21 Dec 2023 12:52:38 -0500 Received: by mail-il1-x12e.google.com with SMTP id e9e14a558f8ab-35fc1a1b52bso3694155ab.2 for ; Thu, 21 Dec 2023 09:52:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1703181153; x=1703785953; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mswE0zppO3OysD2b+plzhkt95Fl+qbU2PSVuPZMwMGc=; b=Ke+UXSPlbEJlfAw1Vov8HazwyMyE2Mc3XZqVXq5UFTZZGdQm4z/RtJyqW7sfJ3Hll7 10l4N5N7E+vvDyTvKva9lF3KO7j1phfHut7HMsOZXOKhbBwPztj8a5cOfup8SMvoxKoS qfd2cfNBwib7E8Ori9N4VOssLY2d52JllLS283TpYju0Qj0wJkQ9Vw1ajec2gZODJa0Z Iezes/uqhRsFEacaEhRdaFZKaFCyfAtq4R1Lr1t1dV5B1Tnhtd+VHsJIsiafXI/NaQCu YysNNYOhFl6Zkh+8ZyZesvYQ7B5pwoqhIVZUnEi5hxY1eY33/OAwsFvu3H10V7eEE/kd fMyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703181153; x=1703785953; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mswE0zppO3OysD2b+plzhkt95Fl+qbU2PSVuPZMwMGc=; b=rifaqDxp9MVOSZhWSx/6tz+QSDhfUHdfDenu1vehYkIBOgWsfpniW9+IQUnKhM8Uby pErJXKycvRQ1pedeNCLYWM+8A2tQYGdofS6MFUgFJK4ou0whfRTzOzN1k312OGKdSlzM FIeORmA9sZhbXAM838uLHZh4Y7QqcKAD7PWY5gGsPjHP73GT19RwBhe1BjKxQVrz2eKj SV7dNnOCxO5sGoBfrq1rh1cVGhFtnlCMSIR9JPXNTxBYSN+onZJgVT3ASr8mXyZkdcJO wao34Zv8K0Y4ROxfVKow2W9BWsL+IvRZZpmccZQX702/qfrYEnK30ncyVlOoo+ZrWBtw UobQ== X-Gm-Message-State: AOJu0YxqyAKlC5j8MedYd5v5dva3Pqk++e0hqOyKgq4fHXMFGEhBfmIF geoF9snua3hJOVyX3Twlf4xtAQLxgdFHGWkOj+0Bxdrf9+XJSQ== X-Google-Smtp-Source: AGHT+IGeBRCHuCaV1S5HuDw9SUVN5QpZvj9NLD/xzAVIh24WhFvv3GvzOv1oGZpZjBdUfU1iON0Q4A== X-Received: by 2002:a05:6e02:1947:b0:35f:cbe0:a3e9 with SMTP id x7-20020a056e02194700b0035fcbe0a3e9mr3677ilu.4.1703181152849; Thu, 21 Dec 2023 09:52:32 -0800 (PST) Received: from grind.dc1.ventanamicro.com ([179.93.21.205]) by smtp.gmail.com with ESMTPSA id w10-20020a63f50a000000b005b18c53d73csm1806261pgh.16.2023.12.21.09.52.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Dec 2023 09:52:32 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza Subject: [PATCH 16/16] target/riscv/cpu.c: move 'marchid' to riscv_cpu_properties[] Date: Thu, 21 Dec 2023 14:51:37 -0300 Message-ID: <20231221175137.497379-17-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231221175137.497379-1-dbarboza@ventanamicro.com> References: <20231221175137.497379-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::12e; envelope-from=dbarboza@ventanamicro.com; helo=mail-il1-x12e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Keep all class properties in riscv_cpu_properties[]. Signed-off-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 110 +++++++++++++++++++++++---------------------- 1 file changed, 57 insertions(+), 53 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index a5607bf1d0..0bcaf7818c 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1930,6 +1930,62 @@ const PropertyInfo prop_mimpid = { .set = prop_mimpid_set, }; +static void prop_marchid_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + bool dynamic_cpu = riscv_cpu_is_dynamic(obj); + RISCVCPU *cpu = RISCV_CPU(obj); + uint64_t prev_val = cpu->cfg.marchid; + uint64_t value, invalid_val; + uint32_t mxlen = 0; + + if (!visit_type_uint64(v, name, &value, errp)) { + return; + } + + if (!dynamic_cpu && prev_val != value) { + error_setg(errp, "Unable to change %s marchid (0x%" PRIu64 ")", + object_get_typename(obj), prev_val); + return; + } + + switch (riscv_cpu_mxl(&cpu->env)) { + case MXL_RV32: + mxlen = 32; + break; + case MXL_RV64: + case MXL_RV128: + mxlen = 64; + break; + default: + g_assert_not_reached(); + } + + invalid_val = 1LL << (mxlen - 1); + + if (value == invalid_val) { + error_setg(errp, "Unable to set marchid with MSB (%u) bit set " + "and the remaining bits zero", mxlen); + return; + } + + cpu->cfg.marchid = value; +} + +static void prop_marchid_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint64_t value = RISCV_CPU(obj)->cfg.marchid; + + visit_type_uint64(v, name, &value, errp); +} + +const PropertyInfo prop_marchid = { + .name = "marchid", + .get = prop_marchid_get, + .set = prop_marchid_set, +}; + static Property riscv_cpu_properties[] = { DEFINE_PROP_BOOL("debug", RISCVCPU, cfg.debug, true), @@ -1956,6 +2012,7 @@ static Property riscv_cpu_properties[] = { {.name = "mvendorid", .info = &prop_mvendorid}, {.name = "mimpid", .info = &prop_mimpid}, + {.name = "marchid", .info = &prop_marchid}, #ifndef CONFIG_USER_ONLY DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), @@ -2021,56 +2078,6 @@ static const struct SysemuCPUOps riscv_sysemu_ops = { }; #endif -static void cpu_set_marchid(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - bool dynamic_cpu = riscv_cpu_is_dynamic(obj); - RISCVCPU *cpu = RISCV_CPU(obj); - uint64_t prev_val = cpu->cfg.marchid; - uint64_t value, invalid_val; - uint32_t mxlen = 0; - - if (!visit_type_uint64(v, name, &value, errp)) { - return; - } - - if (!dynamic_cpu && prev_val != value) { - error_setg(errp, "Unable to change %s marchid (0x%" PRIu64 ")", - object_get_typename(obj), prev_val); - return; - } - - switch (riscv_cpu_mxl(&cpu->env)) { - case MXL_RV32: - mxlen = 32; - break; - case MXL_RV64: - case MXL_RV128: - mxlen = 64; - break; - default: - g_assert_not_reached(); - } - - invalid_val = 1LL << (mxlen - 1); - - if (value == invalid_val) { - error_setg(errp, "Unable to set marchid with MSB (%u) bit set " - "and the remaining bits zero", mxlen); - return; - } - - cpu->cfg.marchid = value; -} - -static void cpu_get_marchid(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - uint64_t value = RISCV_CPU(obj)->cfg.marchid; - - visit_type_uint64(v, name, &value, errp); -} - static void riscv_cpu_class_init(ObjectClass *c, void *data) { RISCVCPUClass *mcc = RISCV_CPU_CLASS(c); @@ -2101,9 +2108,6 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) cc->gdb_arch_name = riscv_gdb_arch_name; cc->gdb_get_dynamic_xml = riscv_gdb_get_dynamic_xml; - object_class_property_add(c, "marchid", "uint64", cpu_get_marchid, - cpu_set_marchid, NULL, NULL); - device_class_set_props(dc, riscv_cpu_properties); }