Message ID | 20231221213838.54944-3-ines.varhol@telecom-paris.fr (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add minimal support for the B-L475E-IOT01A board | expand |
On 21/12/23 22:32, Inès Varhol wrote: > This commit adds a new B-L475E-IOT01A board using the STM32L475VG SoC > as well as a dedicated documentation file. > The implementation is derived from the Netduino Plus 2 machine. > There are no peripherals implemented yet, only memory regions. > > Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> > (please drop newline) > Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> > Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> > --- > MAINTAINERS | 7 +++ > configs/devices/arm-softmmu/default.mak | 1 + > docs/system/arm/b-l475e-iot01a.rst | 46 ++++++++++++++++ > docs/system/arm/stm32.rst | 6 ++- > docs/system/target-arm.rst | 1 + > hw/arm/Kconfig | 6 +++ > hw/arm/b-l475e-iot01a.c | 70 +++++++++++++++++++++++++ > hw/arm/meson.build | 1 + > 8 files changed, 136 insertions(+), 2 deletions(-) > create mode 100644 docs/system/arm/b-l475e-iot01a.rst > create mode 100644 hw/arm/b-l475e-iot01a.c > diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c > new file mode 100644 > index 0000000000..c3790e3dc8 > --- /dev/null > +++ b/hw/arm/b-l475e-iot01a.c > @@ -0,0 +1,70 @@ > +/* > + * B-L475E-IOT01A Discovery Kit machine > + * (B-L475E-IOT01A IoT Node) > + * > + * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr> > + * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr> > + * > + * SPDX-License-Identifier: GPL-2.0-or-later > + * > + * This work is licensed under the terms of the GNU GPL, version 2 or later. > + * See the COPYING file in the top-level directory. > + * > + * This work is heavily inspired by the netduinoplus2 by Alistair Francis. > + * Original code is licensed under the MIT License: > + * > + * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me> > + */ > + > +/* > + * The reference used is the STMicroElectronics UM2153 User manual > + * Discovery kit for IoT node, multi-channel communication with STM32L4. > + * https://www.st.com/en/evaluation-tools/b-l475e-iot01a.html#documentation > + */ > + > +#include "qemu/osdep.h" > +#include "qapi/error.h" > +#include "hw/boards.h" > +#include "hw/qdev-properties.h" > +#include "hw/qdev-clock.h" > +#include "qemu/error-report.h" > +#include "hw/arm/stm32l4x5_soc.h" > +#include "hw/arm/boot.h" > + > +/* Main SYSCLK frequency in Hz (80MHz) */ > +#define SYSCLK_FRQ 80000000ULL Alternative self-documenting name: MAIN_SYSCLK_FREQ_HZ > +static void b_l475e_iot01a_machine_init(MachineClass *mc) > +{ > + static const char *machine_valid_cpu_types[] = { > + ARM_CPU_TYPE_NAME("cortex-m4"), > + NULL}; Per our coding style, the trailing '}' goes on a newline. > + mc->desc = "B-L475E-IOT01A Discovery Kit (Cortex-M4)"; > + mc->init = b_l475e_iot01a_init; > + mc->valid_cpu_types = machine_valid_cpu_types; > + > + /* SRAM pre-allocated as part of the SoC instantiation */ > + mc->default_ram_size = 0; > +} Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
On 21/12/23 22:32, Inès Varhol wrote: > This commit adds a new B-L475E-IOT01A board using the STM32L475VG SoC > as well as a dedicated documentation file. > The implementation is derived from the Netduino Plus 2 machine. > There are no peripherals implemented yet, only memory regions. > > Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> > > Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> > Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> > --- > MAINTAINERS | 7 +++ > configs/devices/arm-softmmu/default.mak | 1 + > docs/system/arm/b-l475e-iot01a.rst | 46 ++++++++++++++++ > docs/system/arm/stm32.rst | 6 ++- > docs/system/target-arm.rst | 1 + > hw/arm/Kconfig | 6 +++ > hw/arm/b-l475e-iot01a.c | 70 +++++++++++++++++++++++++ > hw/arm/meson.build | 1 + > 8 files changed, 136 insertions(+), 2 deletions(-) > create mode 100644 docs/system/arm/b-l475e-iot01a.rst > create mode 100644 hw/arm/b-l475e-iot01a.c > diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c > new file mode 100644 > index 0000000000..c3790e3dc8 > --- /dev/null > +++ b/hw/arm/b-l475e-iot01a.c > @@ -0,0 +1,70 @@ > +/* > + * B-L475E-IOT01A Discovery Kit machine > + * (B-L475E-IOT01A IoT Node) > + * > + * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr> > + * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr> > + * > + * SPDX-License-Identifier: GPL-2.0-or-later > + * > + * This work is licensed under the terms of the GNU GPL, version 2 or later. > + * See the COPYING file in the top-level directory. > + * > + * This work is heavily inspired by the netduinoplus2 by Alistair Francis. > + * Original code is licensed under the MIT License: > + * > + * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me> > + */ > + > +/* > + * The reference used is the STMicroElectronics UM2153 User manual > + * Discovery kit for IoT node, multi-channel communication with STM32L4. > + * https://www.st.com/en/evaluation-tools/b-l475e-iot01a.html#documentation > + */ > + > +#include "qemu/osdep.h" > +#include "qapi/error.h" > +#include "hw/boards.h" > +#include "hw/qdev-properties.h" > +#include "hw/qdev-clock.h" > +#include "qemu/error-report.h" > +#include "hw/arm/stm32l4x5_soc.h" > +#include "hw/arm/boot.h" > + > +/* Main SYSCLK frequency in Hz (80MHz) */ > +#define SYSCLK_FRQ 80000000ULL > + > +static void b_l475e_iot01a_init(MachineState *machine) > +{ > + const Stm32l4x5SocClass *sc; > + DeviceState *dev; > + Clock *sysclk; > + > + /* This clock doesn't need migration because it is fixed-frequency */ > + sysclk = clock_new(OBJECT(machine), "SYSCLK"); > + clock_set_hz(sysclk, SYSCLK_FRQ); > + > + dev = qdev_new(TYPE_STM32L4X5XG_SOC); Missing machine parentship relation. > + sc = STM32L4X5_SOC_GET_CLASS(dev); > + qdev_connect_clock_in(dev, "sysclk", sysclk); > + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); > + > + armv7m_load_kernel(ARM_CPU(first_cpu), > + machine->kernel_filename, > + 0, sc->flash_size); > +} Using: -- >8 -- diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c index c3790e3dc8..85b8cdcd57 100644 --- a/hw/arm/b-l475e-iot01a.c +++ b/hw/arm/b-l475e-iot01a.c @@ -45,10 +45,11 @@ static void b_l475e_iot01a_init(MachineState *machine) clock_set_hz(sysclk, SYSCLK_FRQ); dev = qdev_new(TYPE_STM32L4X5XG_SOC); - sc = STM32L4X5_SOC_GET_CLASS(dev); + object_property_add_child(OBJECT(machine), "soc", OBJECT(dev)); qdev_connect_clock_in(dev, "sysclk", sysclk); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + sc = STM32L4X5_SOC_GET_CLASS(dev); armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, 0, sc->flash_size); --- we get: (qemu) info qom-tree /machine (b-l475e-iot01a-machine) /SYSCLK (clock) /peripheral (container) /peripheral-anon (container) /soc (stm32l4x5xg-soc) /SRAM1[0] (memory-region) /SRAM2[0] (memory-region) /armv7m (armv7m) /armv7m-container[0] (memory-region) /bitband[0] (ARM-bitband-memory) /bitband[0] (memory-region) /bitband[1] (ARM-bitband-memory) /bitband[0] (memory-region) /cpu (cortex-m4-arm-cpu) /unnamed-gpio-in[0] (irq) /unnamed-gpio-in[1] (irq) /unnamed-gpio-in[2] (irq) /unnamed-gpio-in[3] (irq) /cpuclk (clock) /nvic (armv7m_nvic) /NMI[0] (irq) ...
diff --git a/MAINTAINERS b/MAINTAINERS index e5b28aee28..3f3831c92a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1131,6 +1131,13 @@ S: Maintained F: hw/arm/stm32l4x5_soc.c F: include/hw/arm/stm32l4x5_soc.h +B-L475E-IOT01A IoT Node +M: Arnaud Minier <arnaud.minier@telecom-paris.fr> +M: Inès Varhol <ines.varhol@telecom-paris.fr> +L: qemu-arm@nongnu.org +S: Maintained +F: hw/arm/b-l475e-iot01a.c + SmartFusion2 M: Subbaraya Sundeep <sundeep.lkml@gmail.com> M: Peter Maydell <peter.maydell@linaro.org> diff --git a/configs/devices/arm-softmmu/default.mak b/configs/devices/arm-softmmu/default.mak index 980c48a7d9..023faa2f75 100644 --- a/configs/devices/arm-softmmu/default.mak +++ b/configs/devices/arm-softmmu/default.mak @@ -19,6 +19,7 @@ CONFIG_ARM_VIRT=y # CONFIG_NSERIES=n # CONFIG_STELLARIS=n # CONFIG_STM32VLDISCOVERY=n +# CONFIG_B_L475E_IOT01A=n # CONFIG_REALVIEW=n # CONFIG_VERSATILE=n # CONFIG_VEXPRESS=n diff --git a/docs/system/arm/b-l475e-iot01a.rst b/docs/system/arm/b-l475e-iot01a.rst new file mode 100644 index 0000000000..2b128e6b84 --- /dev/null +++ b/docs/system/arm/b-l475e-iot01a.rst @@ -0,0 +1,46 @@ +B-L475E-IOT01A IoT Node (``b-l475e-iot01a``) +============================================ + +The B-L475E-IOT01A IoT Node uses the STM32L475VG SoC which is based on +ARM Cortex-M4F core. It is part of STMicroelectronics +:doc:`STM32 boards </system/arm/stm32>` and more specifically the STM32L4 +ultra-low power series. The STM32L4x5 chip runs at up to 80 MHz and +integrates 128 KiB of SRAM and up to 1MiB of Flash. The B-L475E-IOT01A board +namely features 64 Mibit QSPI Flash, BT, WiFi and RF connectivity, +USART, I2C, SPI, CAN and USB OTG, as well as a variety of sensors. + +Supported devices +""""""""""""""""" + +Currently, B-L475E-IOT01A machine's implementation is minimal, +it only supports the following device: + +- Cortex-M4F based STM32L4x5 SoC + +Missing devices +""""""""""""""" + +The B-L475E-IOT01A does *not* support the following devices: + +- Extended interrupts and events controller (EXTI) +- Reset and clock control (RCC) +- Serial ports (UART) +- System configuration controller (SYSCFG) +- General-purpose I/Os (GPIO) +- Analog to Digital Converter (ADC) +- SPI controller +- Timer controller (TIMER) + +See the complete list of unimplemented peripheral devices +in the STM32L4x5 module : ``./hw/arm/stm32l4x5_soc.c`` + +Boot options +"""""""""""" + +The B-L475E-IOT01A machine can be started using the ``-kernel`` +option to load a firmware. Example: + +.. code-block:: bash + + $ qemu-system-arm -M b-l475e-iot01a -kernel firmware.bin + diff --git a/docs/system/arm/stm32.rst b/docs/system/arm/stm32.rst index d7265b763d..3b640f3ee0 100644 --- a/docs/system/arm/stm32.rst +++ b/docs/system/arm/stm32.rst @@ -16,11 +16,13 @@ based on this chip : - ``netduino2`` Netduino 2 board with STM32F205RFT6 microcontroller -The STM32F4 series is based on ARM Cortex-M4F core. This series is pin-to-pin -compatible with STM32F2 series. The following machines are based on this chip : +The STM32F4 series is based on ARM Cortex-M4F core, as well as the STM32L4 +ultra-low-power series. The STM32F4 series is pin-to-pin compatible with STM32F2 series. +The following machines are based on this ARM Cortex-M4F chip : - ``netduinoplus2`` Netduino Plus 2 board with STM32F405RGT6 microcontroller - ``olimex-stm32-h405`` Olimex STM32 H405 board with STM32F405RGT6 microcontroller +- ``b-l475e-iot01a`` :doc:`B-L475E-IOT01A IoT Node </system/arm/b-l475e-iot01a>` board with STM32L475VG microcontroller There are many other STM32 series that are currently not supported by QEMU. diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index 790ac1b8a2..c9d7c0dda7 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -84,6 +84,7 @@ undocumented; you can get a complete list by running arm/vexpress arm/aspeed arm/bananapi_m2u.rst + arm/b-l475e-iot01a.rst arm/sabrelite arm/digic arm/cubieboard diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index d2b94d9a47..7520dc5cc0 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -448,6 +448,12 @@ config STM32F405_SOC select STM32F4XX_SYSCFG select STM32F4XX_EXTI +config B_L475E_IOT01A + bool + default y + depends on TCG && ARM + select STM32L4X5_SOC + config STM32L4X5_SOC bool select ARM_V7M diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c new file mode 100644 index 0000000000..c3790e3dc8 --- /dev/null +++ b/hw/arm/b-l475e-iot01a.c @@ -0,0 +1,70 @@ +/* + * B-L475E-IOT01A Discovery Kit machine + * (B-L475E-IOT01A IoT Node) + * + * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr> + * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr> + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * + * This work is heavily inspired by the netduinoplus2 by Alistair Francis. + * Original code is licensed under the MIT License: + * + * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me> + */ + +/* + * The reference used is the STMicroElectronics UM2153 User manual + * Discovery kit for IoT node, multi-channel communication with STM32L4. + * https://www.st.com/en/evaluation-tools/b-l475e-iot01a.html#documentation + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/boards.h" +#include "hw/qdev-properties.h" +#include "hw/qdev-clock.h" +#include "qemu/error-report.h" +#include "hw/arm/stm32l4x5_soc.h" +#include "hw/arm/boot.h" + +/* Main SYSCLK frequency in Hz (80MHz) */ +#define SYSCLK_FRQ 80000000ULL + +static void b_l475e_iot01a_init(MachineState *machine) +{ + const Stm32l4x5SocClass *sc; + DeviceState *dev; + Clock *sysclk; + + /* This clock doesn't need migration because it is fixed-frequency */ + sysclk = clock_new(OBJECT(machine), "SYSCLK"); + clock_set_hz(sysclk, SYSCLK_FRQ); + + dev = qdev_new(TYPE_STM32L4X5XG_SOC); + sc = STM32L4X5_SOC_GET_CLASS(dev); + qdev_connect_clock_in(dev, "sysclk", sysclk); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + + armv7m_load_kernel(ARM_CPU(first_cpu), + machine->kernel_filename, + 0, sc->flash_size); +} + +static void b_l475e_iot01a_machine_init(MachineClass *mc) +{ + static const char *machine_valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m4"), + NULL}; + mc->desc = "B-L475E-IOT01A Discovery Kit (Cortex-M4)"; + mc->init = b_l475e_iot01a_init; + mc->valid_cpu_types = machine_valid_cpu_types; + + /* SRAM pre-allocated as part of the SoC instantiation */ + mc->default_ram_size = 0; +} + +DEFINE_MACHINE("b-l475e-iot01a", b_l475e_iot01a_machine_init) diff --git a/hw/arm/meson.build b/hw/arm/meson.build index 9766da10c4..bb92b27db3 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -42,6 +42,7 @@ arm_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2836.c', 'raspi.c')) arm_ss.add(when: 'CONFIG_STM32F100_SOC', if_true: files('stm32f100_soc.c')) arm_ss.add(when: 'CONFIG_STM32F205_SOC', if_true: files('stm32f205_soc.c')) arm_ss.add(when: 'CONFIG_STM32F405_SOC', if_true: files('stm32f405_soc.c')) +arm_ss.add(when: 'CONFIG_B_L475E_IOT01A', if_true: files('b-l475e-iot01a.c')) arm_ss.add(when: 'CONFIG_STM32L4X5_SOC', if_true: files('stm32l4x5_soc.c')) arm_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp.c', 'xlnx-zcu102.c')) arm_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal.c', 'xlnx-versal-virt.c'))