Message ID | 20240106181503.1746200-3-sam@rfc1149.net (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add "num-prio-bits" property for Cortex-M devices | expand |
On 6/1/24 19:15, Samuel Tardieu wrote: > A SoC will not have a direct access to the NVIC embedded in its ARM > core. By aliasing the "num-prio-bits" property similarly to what is > done for the "num-irq" one, a SoC can easily configure it on its > armv7m instance. > > Signed-off-by: Samuel Tardieu <sam@rfc1149.net> > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> > --- > hw/arm/armv7m.c | 2 ++ > include/hw/arm/armv7m.h | 1 + > 2 files changed, 3 insertions(+) Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index e39b61bc1a..1f21827773 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -256,6 +256,8 @@ static void armv7m_instance_init(Object *obj) object_initialize_child(obj, "nvic", &s->nvic, TYPE_NVIC); object_property_add_alias(obj, "num-irq", OBJECT(&s->nvic), "num-irq"); + object_property_add_alias(obj, "num-prio-bits", + OBJECT(&s->nvic), "num-prio-bits"); object_initialize_child(obj, "systick-reg-ns", &s->systick[M_REG_NS], TYPE_SYSTICK); diff --git a/include/hw/arm/armv7m.h b/include/hw/arm/armv7m.h index e2cebbd15c..5c057ab2ec 100644 --- a/include/hw/arm/armv7m.h +++ b/include/hw/arm/armv7m.h @@ -43,6 +43,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(ARMv7MState, ARMV7M) * a qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET). * + Property "cpu-type": CPU type to instantiate * + Property "num-irq": number of external IRQ lines + * + Property "num-prio-bits": number of priority bits in the NVIC * + Property "memory": MemoryRegion defining the physical address space * that CPU accesses see. (The NVIC, bitbanding and other CPU-internal * devices will be automatically layered on top of this view.)