Message ID | 20240111161644.33630-3-rbradford@rivosinc.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | target/riscv: Add support for 'B' extension | expand |
On Fri, Jan 12, 2024 at 2:17 AM Rob Bradford <rbradford@rivosinc.com> wrote: > > If the B extension is enabled warn if the user has disabled any of the > required extensions that are part of the 'B' extension. Conversely > enable the extensions that make up the 'B' extension if it is enabled. > > Signed-off-by: Rob Bradford <rbradford@rivosinc.com> > Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/tcg/tcg-cpu.c | 33 +++++++++++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c > index 5396c6c3eb..b5ba78240e 100644 > --- a/target/riscv/tcg/tcg-cpu.c > +++ b/target/riscv/tcg/tcg-cpu.c > @@ -442,6 +442,35 @@ static void riscv_cpu_validate_g(RISCVCPU *cpu) > } > } > > +static void riscv_cpu_validate_b(RISCVCPU *cpu) > +{ > + const char *warn_msg = "RVB mandates disabled extension %s"; > + > + if (!cpu->cfg.ext_zba) { > + if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zba))) { > + cpu->cfg.ext_zba = true; > + } else { > + warn_report(warn_msg, "zba"); > + } > + } > + > + if (!cpu->cfg.ext_zbb) { > + if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zbb))) { > + cpu->cfg.ext_zbb = true; > + } else { > + warn_report(warn_msg, "zbb"); > + } > + } > + > + if (!cpu->cfg.ext_zbs) { > + if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zbs))) { > + cpu->cfg.ext_zbs = true; > + } else { > + warn_report(warn_msg, "zbs"); > + } > + } > +} > + > /* > * Check consistency between chosen extensions while setting > * cpu->cfg accordingly. > @@ -455,6 +484,10 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp) > riscv_cpu_validate_g(cpu); > } > > + if (riscv_has_ext(env, RVB)) { > + riscv_cpu_validate_b(cpu); > + } > + > if (riscv_has_ext(env, RVI) && riscv_has_ext(env, RVE)) { > error_setg(errp, > "I and E extensions are incompatible"); > -- > 2.43.0 > >
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 5396c6c3eb..b5ba78240e 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -442,6 +442,35 @@ static void riscv_cpu_validate_g(RISCVCPU *cpu) } } +static void riscv_cpu_validate_b(RISCVCPU *cpu) +{ + const char *warn_msg = "RVB mandates disabled extension %s"; + + if (!cpu->cfg.ext_zba) { + if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zba))) { + cpu->cfg.ext_zba = true; + } else { + warn_report(warn_msg, "zba"); + } + } + + if (!cpu->cfg.ext_zbb) { + if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zbb))) { + cpu->cfg.ext_zbb = true; + } else { + warn_report(warn_msg, "zbb"); + } + } + + if (!cpu->cfg.ext_zbs) { + if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zbs))) { + cpu->cfg.ext_zbs = true; + } else { + warn_report(warn_msg, "zbs"); + } + } +} + /* * Check consistency between chosen extensions while setting * cpu->cfg accordingly. @@ -455,6 +484,10 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp) riscv_cpu_validate_g(cpu); } + if (riscv_has_ext(env, RVB)) { + riscv_cpu_validate_b(cpu); + } + if (riscv_has_ext(env, RVI) && riscv_has_ext(env, RVE)) { error_setg(errp, "I and E extensions are incompatible");