[v3,07/13] target/riscv/vector_helper.c: use 'vlenb'

Message ID	20240116205817.344178-8-dbarboza@ventanamicro.com (mailing list archive)
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Headers	show Return-Path: <qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org> From: Daniel Henrique Barboza <dbarboza@ventanamicro.com> To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza <dbarboza@ventanamicro.com> Subject: [PATCH v3 07/13] target/riscv/vector_helper.c: use 'vlenb' Date: Tue, 16 Jan 2024 17:58:11 -0300 Message-ID: <20240116205817.344178-8-dbarboza@ventanamicro.com> In-Reply-To: <20240116205817.344178-1-dbarboza@ventanamicro.com> References: <20240116205817.344178-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=dbarboza@ventanamicro.com; helo=mail-pj1-x102d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org
Series	target/riscv: add 'cpu->cfg.vlenb', remove 'cpu->cfg.vlen' \| expand [v3,00/13] target/riscv: add 'cpu->cfg.vlenb', remove 'cpu->cfg.vlen' [v3,01/13] target/riscv: add 'vlenb' field in cpu->cfg [v3,02/13] target/riscv/csr.c: use 'vlenb' instead of 'vlen' [v3,03/13] target/riscv/gdbstub.c: use 'vlenb' instead of shifting 'vlen' [v3,04/13] target/riscv/insn_trans/trans_rvbf16.c.inc: use cpu->cfg.vlenb [v3,05/13] target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb' [v3,06/13] target/riscv/insn_trans/trans_rvvk.c.inc: use 'vlenb' [v3,07/13] target/riscv/vector_helper.c: use 'vlenb' [v3,08/13] target/riscv/vector_helper.c: use vlenb in HELPER(vsetvl) [v3,09/13] target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb' in MAXSZ() [v3,10/13] target/riscv/cpu.h: use 'vlenb' in vext_get_vlmax() [v3,11/13] target/riscv: change vext_get_vlmax() arguments [v3,12/13] trans_rvv.c.inc: use vext_get_vlmax() in trans_vrgather_v*() [v3,13/13] target/riscv/cpu.c: remove cpu->cfg.vlen

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20240116205817.344178-8-dbarboza@ventanamicro.com (mailing list archive)

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From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org,
 liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
 richard.henderson@linaro.org, max.chou@sifive.com,
 Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH v3 07/13] target/riscv/vector_helper.c: use 'vlenb'
Date: Tue, 16 Jan 2024 17:58:11 -0300
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Series

target/riscv: add 'cpu->cfg.vlenb', remove 'cpu->cfg.vlen' | expand

Commit Message

Daniel Henrique Barboza Jan. 16, 2024, 8:58 p.m. UTC

Use 'cpu->cfg.vlenb' instead of 'cpu->cfg.vlen >> 3'.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/riscv/vector_helper.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

Comments

Alistair Francis Jan. 22, 2024, 2:59 a.m. UTC | #1

On Wed, Jan 17, 2024 at 8:18 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Use 'cpu->cfg.vlenb' instead of 'cpu->cfg.vlen >> 3'.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/vector_helper.c | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index c1c3a4d1ea..cb944229b0 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -558,7 +558,7 @@ vext_ldst_whole(void *vd, target_ulong base, CPURISCVState *env, uint32_t desc,
>  {
>      uint32_t i, k, off, pos;
>      uint32_t nf = vext_nf(desc);
> -    uint32_t vlenb = riscv_cpu_cfg(env)->vlen >> 3;
> +    uint32_t vlenb = riscv_cpu_cfg(env)->vlenb;
>      uint32_t max_elems = vlenb >> log2_esz;
>
>      k = env->vstart / max_elems;
> @@ -929,7 +929,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,   \
>  {                                                             \
>      uint32_t vl = env->vl;                                    \
>      uint32_t vm = vext_vm(desc);                              \
> -    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;          \
> +    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;    \
>      uint32_t vta_all_1s = vext_vta_all_1s(desc);              \
>      uint32_t i;                                               \
>                                                                \
> @@ -967,7 +967,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1,          \
>  {                                                               \
>      uint32_t vl = env->vl;                                      \
>      uint32_t vm = vext_vm(desc);                                \
> -    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;            \
> +    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;      \
>      uint32_t vta_all_1s = vext_vta_all_1s(desc);                \
>      uint32_t i;                                                 \
>                                                                  \
> @@ -1171,7 +1171,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,   \
>  {                                                             \
>      uint32_t vm = vext_vm(desc);                              \
>      uint32_t vl = env->vl;                                    \
> -    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;          \
> +    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;    \
>      uint32_t vta_all_1s = vext_vta_all_1s(desc);              \
>      uint32_t vma = vext_vma(desc);                            \
>      uint32_t i;                                               \
> @@ -1236,7 +1236,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2,   \
>  {                                                                   \
>      uint32_t vm = vext_vm(desc);                                    \
>      uint32_t vl = env->vl;                                          \
> -    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;                \
> +    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;          \
>      uint32_t vta_all_1s = vext_vta_all_1s(desc);                    \
>      uint32_t vma = vext_vma(desc);                                  \
>      uint32_t i;                                                     \
> @@ -3971,7 +3971,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,   \
>  {                                                             \
>      uint32_t vm = vext_vm(desc);                              \
>      uint32_t vl = env->vl;                                    \
> -    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;          \
> +    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;    \
>      uint32_t vta_all_1s = vext_vta_all_1s(desc);              \
>      uint32_t vma = vext_vma(desc);                            \
>      uint32_t i;                                               \
> @@ -4011,7 +4011,7 @@ void HELPER(NAME)(void *vd, void *v0, uint64_t s1, void *vs2,       \
>  {                                                                   \
>      uint32_t vm = vext_vm(desc);                                    \
>      uint32_t vl = env->vl;                                          \
> -    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;                \
> +    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;          \
>      uint32_t vta_all_1s = vext_vta_all_1s(desc);                    \
>      uint32_t vma = vext_vma(desc);                                  \
>      uint32_t i;                                                     \
> @@ -4528,7 +4528,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1,          \
>                    uint32_t desc)                          \
>  {                                                         \
>      uint32_t vl = env->vl;                                \
> -    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;      \
> +    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;\
>      uint32_t vta_all_1s = vext_vta_all_1s(desc);          \
>      uint32_t i;                                           \
>      int a, b;                                             \
> @@ -4615,7 +4615,7 @@ static void vmsetm(void *vd, void *v0, void *vs2, CPURISCVState *env,
>  {
>      uint32_t vm = vext_vm(desc);
>      uint32_t vl = env->vl;
> -    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;
> +    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;
>      uint32_t vta_all_1s = vext_vta_all_1s(desc);
>      uint32_t vma = vext_vma(desc);
>      int i;
> --
> 2.43.0
>
>

diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index c1c3a4d1ea..cb944229b0 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -558,7 +558,7 @@  vext_ldst_whole(void *vd, target_ulong base, CPURISCVState *env, uint32_t desc,
 {
     uint32_t i, k, off, pos;
     uint32_t nf = vext_nf(desc);
-    uint32_t vlenb = riscv_cpu_cfg(env)->vlen >> 3;
+    uint32_t vlenb = riscv_cpu_cfg(env)->vlenb;
     uint32_t max_elems = vlenb >> log2_esz;
 
     k = env->vstart / max_elems;
@@ -929,7 +929,7 @@  void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,   \
 {                                                             \
     uint32_t vl = env->vl;                                    \
     uint32_t vm = vext_vm(desc);                              \
-    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;          \
+    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;    \
     uint32_t vta_all_1s = vext_vta_all_1s(desc);              \
     uint32_t i;                                               \
                                                               \
@@ -967,7 +967,7 @@  void HELPER(NAME)(void *vd, void *v0, target_ulong s1,          \
 {                                                               \
     uint32_t vl = env->vl;                                      \
     uint32_t vm = vext_vm(desc);                                \
-    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;            \
+    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;      \
     uint32_t vta_all_1s = vext_vta_all_1s(desc);                \
     uint32_t i;                                                 \
                                                                 \
@@ -1171,7 +1171,7 @@  void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,   \
 {                                                             \
     uint32_t vm = vext_vm(desc);                              \
     uint32_t vl = env->vl;                                    \
-    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;          \
+    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;    \
     uint32_t vta_all_1s = vext_vta_all_1s(desc);              \
     uint32_t vma = vext_vma(desc);                            \
     uint32_t i;                                               \
@@ -1236,7 +1236,7 @@  void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2,   \
 {                                                                   \
     uint32_t vm = vext_vm(desc);                                    \
     uint32_t vl = env->vl;                                          \
-    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;                \
+    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;          \
     uint32_t vta_all_1s = vext_vta_all_1s(desc);                    \
     uint32_t vma = vext_vma(desc);                                  \
     uint32_t i;                                                     \
@@ -3971,7 +3971,7 @@  void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2,   \
 {                                                             \
     uint32_t vm = vext_vm(desc);                              \
     uint32_t vl = env->vl;                                    \
-    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;          \
+    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;    \
     uint32_t vta_all_1s = vext_vta_all_1s(desc);              \
     uint32_t vma = vext_vma(desc);                            \
     uint32_t i;                                               \
@@ -4011,7 +4011,7 @@  void HELPER(NAME)(void *vd, void *v0, uint64_t s1, void *vs2,       \
 {                                                                   \
     uint32_t vm = vext_vm(desc);                                    \
     uint32_t vl = env->vl;                                          \
-    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;                \
+    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;          \
     uint32_t vta_all_1s = vext_vta_all_1s(desc);                    \
     uint32_t vma = vext_vma(desc);                                  \
     uint32_t i;                                                     \
@@ -4528,7 +4528,7 @@  void HELPER(NAME)(void *vd, void *v0, void *vs1,          \
                   uint32_t desc)                          \
 {                                                         \
     uint32_t vl = env->vl;                                \
-    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;      \
+    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;\
     uint32_t vta_all_1s = vext_vta_all_1s(desc);          \
     uint32_t i;                                           \
     int a, b;                                             \
@@ -4615,7 +4615,7 @@  static void vmsetm(void *vd, void *v0, void *vs2, CPURISCVState *env,
 {
     uint32_t vm = vext_vm(desc);
     uint32_t vl = env->vl;
-    uint32_t total_elems = riscv_cpu_cfg(env)->vlen;
+    uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;
     uint32_t vta_all_1s = vext_vta_all_1s(desc);
     uint32_t vma = vext_vma(desc);
     int i;

[v3,07/13] target/riscv/vector_helper.c: use 'vlenb'

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