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Thu, 18 Jan 2024 05:25:21 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9815C20040; Thu, 18 Jan 2024 05:25:19 +0000 (GMT) Received: from li-1901474c-32f3-11b2-a85c-fc5ff2c001f3.in.ibm.com (unknown [9.109.243.35]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Thu, 18 Jan 2024 05:25:19 +0000 (GMT) From: Harsh Prateek Bora To: npiggin@gmail.com, qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org, clegoate@redhat.com, mikey@neuling.org, amachhiw@linux.vnet.ibm.com, vaibhav@linux.ibm.com, sbhat@linux.ibm.com, danielhb413@gmail.com Subject: [PATCH v3 15/15] spapr: nested: Set the PCR when logical PVR is set Date: Thu, 18 Jan 2024 10:54:38 +0530 Message-Id: <20240118052438.1475437-16-harshpb@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240118052438.1475437-1-harshpb@linux.ibm.com> References: <20240118052438.1475437-1-harshpb@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Z08FQOxZv2Mkk5-gYXGjKg3BlzOwxaPd X-Proofpoint-ORIG-GUID: diB_anQEvy9gegSnw9pOC86eQh-dwUMO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-18_02,2024-01-17_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 phishscore=0 mlxscore=0 spamscore=0 bulkscore=0 mlxlogscore=999 clxscore=1015 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2401180035 Received-SPF: pass client-ip=148.163.158.5; envelope-from=harshpb@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Amit Machhiwal In APIv1, KVM L0 sets the PCR, while in the nested papr APIv2, this doesn't work as the PCR can't be set via the guest state buffer; the logical PVR is set via the GSB though. This change sets the PCR whenever the logical PVR is set via the GSB. Also, unlike the other registers, the value 1 in a defined bit in the PCR makes the affected resources unavailable and the value 0 makes them available. Hence, the PCR is set accordingly. Signed-off-by: Amit Machhiwal Signed-off-by: Harsh Prateek Bora --- include/hw/ppc/spapr_nested.h | 9 +++++++++ hw/ppc/spapr_nested.c | 24 ++++++++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/include/hw/ppc/spapr_nested.h b/include/hw/ppc/spapr_nested.h index 18dd82009d..bdd2aa2d52 100644 --- a/include/hw/ppc/spapr_nested.h +++ b/include/hw/ppc/spapr_nested.h @@ -230,6 +230,15 @@ typedef struct SpaprMachineStateNestedGuest { #define GUEST_STATE_REQUEST_GUEST_WIDE 0x1 #define GUEST_STATE_REQUEST_SET 0x2 +/* As per ISA v3.1B, following bits are reserved: + * 0:2 + * 4:57 (ISA mentions bit 58 as well but it should be used for P10) + * 61:63 (hence, haven't included PCR bits for v2.06 and v2.05 + * in LOW BITS) + */ +#define PCR_LOW_BITS (PCR_COMPAT_3_10 | PCR_COMPAT_3_00) +#define HVMASK_PCR ~PCR_LOW_BITS + #define GUEST_STATE_ELEMENT(i, sz, s, f, ptr, c) { \ .id = (i), \ .size = (sz), \ diff --git a/hw/ppc/spapr_nested.c b/hw/ppc/spapr_nested.c index b91413e09a..75e07f454d 100644 --- a/hw/ppc/spapr_nested.c +++ b/hw/ppc/spapr_nested.c @@ -740,9 +740,11 @@ static void out_buf_min_size(void *a, void *b, bool set) static void copy_logical_pvr(void *a, void *b, bool set) { + SpaprMachineStateNestedGuest *guest; uint32_t *buf; /* 1 word */ uint32_t *pvr_logical_ptr; uint32_t pvr_logical; + target_ulong pcr = 0; pvr_logical_ptr = a; buf = b; @@ -755,6 +757,28 @@ static void copy_logical_pvr(void *a, void *b, bool set) pvr_logical = be32_to_cpu(buf[0]); *pvr_logical_ptr = pvr_logical; + + if (*pvr_logical_ptr) { + switch (*pvr_logical_ptr) { + case CPU_POWERPC_LOGICAL_3_10: + pcr = PCR_COMPAT_3_10 | PCR_COMPAT_3_00; + break; + case CPU_POWERPC_LOGICAL_3_00: + pcr = PCR_COMPAT_3_00; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "Could not set PCR for LPVR=0x%08x\n", *pvr_logical_ptr); + return; + } + } + + guest = container_of(pvr_logical_ptr, + struct SpaprMachineStateNestedGuest, + pvr_logical); + for (int i = 0; i < guest->vcpus; i++) { + guest->vcpu[i].state.pcr = ~pcr | HVMASK_PCR; + } } static void copy_tb_offset(void *a, void *b, bool set)