@@ -378,13 +378,18 @@ typedef struct PCIIOMMUOps {
*
* Mandatory callback which returns a pointer to an #AddressSpace
*
- * @bus: the #PCIBus being accessed.
+ * @bus: the aliased #PCIBus being accessed.
*
* @opaque: the data passed to pci_setup_iommu().
*
- * @devfn: device and function number
+ * @devfn: aliased device and function number
+ *
+ * @real_bus: the #PCIBus being accessed.
+ *
+ * @real_devfn: device and function number
*/
- AddressSpace * (*get_address_space)(PCIBus *bus, void *opaque, int devfn);
+ AddressSpace * (*get_address_space)(PCIBus *bus, void *opaque, int devfn,
+ PCIBus *real_bus, int real_devfn);
} PCIIOMMUOps;
AddressSpace *pci_device_iommu_address_space(PCIDevice *dev);
@@ -732,7 +732,8 @@ static IOMMUTLBEntry typhoon_translate_iommu(IOMMUMemoryRegion *iommu,
return ret;
}
-static AddressSpace *typhoon_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
+static AddressSpace *typhoon_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn,
+ PCIBus *real_bus, int real_devfn)
{
TyphoonState *s = opaque;
return &s->pchip.iommu_as;
@@ -569,7 +569,8 @@ SMMUPciBus *smmu_find_smmu_pcibus(SMMUState *s, uint8_t bus_num)
return NULL;
}
-static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn)
+static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn,
+ PCIBus *real_bus, int real_devfn)
{
SMMUState *s = opaque;
SMMUPciBus *sbus = g_hash_table_lookup(s->smmu_pcibus_by_busptr, bus);
@@ -1390,7 +1390,8 @@ static const MemoryRegionOps amdvi_ir_ops = {
}
};
-static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
+static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn,
+ PCIBus *real_bus, int real_devfn)
{
char name[128];
AMDVIState *s = opaque;
@@ -1578,7 +1579,8 @@ static void amdvi_sysbus_realize(DeviceState *dev, Error **errp)
}
/* Pseudo address space under root PCI bus. */
- x86ms->ioapic_as = amdvi_host_dma_iommu(bus, s, AMDVI_IOAPIC_SB_DEVID);
+ x86ms->ioapic_as = amdvi_host_dma_iommu(bus, s, AMDVI_IOAPIC_SB_DEVID,
+ NULL, 0);
/* set up MMIO */
memory_region_init_io(&s->mmio, OBJECT(s), &mmio_mem_ops, s, "amdvi-mmio",
@@ -4094,7 +4094,8 @@ static void vtd_reset(DeviceState *dev)
vtd_address_space_refresh_all(s);
}
-static AddressSpace *vtd_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
+static AddressSpace *vtd_host_dma_iommu(PCIBus *bus, void *opaque, int devfn,
+ PCIBus *real_bus, int real_devfn)
{
IntelIOMMUState *s = opaque;
VTDAddressSpace *vtd_as;
@@ -4233,7 +4234,8 @@ static void vtd_realize(DeviceState *dev, Error **errp)
vtd_init(s);
pci_setup_iommu(bus, &vtd_iommu_ops, dev);
/* Pseudo address space under root PCI bus. */
- x86ms->ioapic_as = vtd_host_dma_iommu(bus, s, Q35_PSEUDO_DEVFN_IOAPIC);
+ x86ms->ioapic_as = vtd_host_dma_iommu(bus, s, Q35_PSEUDO_DEVFN_IOAPIC,
+ NULL, 0);
qemu_add_machine_init_done_notifier(&vtd_machine_done_notify);
}
@@ -337,7 +337,8 @@ static IOMMUTLBEntry astro_translate_iommu(IOMMUMemoryRegion *iommu,
}
static AddressSpace *elroy_pcihost_set_iommu(PCIBus *bus, void *opaque,
- int devfn)
+ int devfn,
+ PCIBus *real_bus, int real_devfn)
{
ElroyState *s = opaque;
return &s->astro->iommu_as;
@@ -656,7 +656,8 @@ static const MemoryRegionOps designware_pci_mmio_ops = {
};
static AddressSpace *designware_pcie_host_set_iommu(PCIBus *bus, void *opaque,
- int devfn)
+ int devfn, PCIBus *real_bus,
+ int real_devfn)
{
DesignwarePCIEHost *s = DESIGNWARE_PCIE_HOST(opaque);
@@ -347,7 +347,8 @@ static const MemoryRegionOps dino_config_addr_ops = {
};
static AddressSpace *dino_pcihost_set_iommu(PCIBus *bus, void *opaque,
- int devfn)
+ int devfn, PCIBus *real_bus,
+ int real_devfn)
{
DinoState *s = opaque;
@@ -935,7 +935,8 @@ static const MemoryRegionOps pnv_phb3_msi_ops = {
.endianness = DEVICE_LITTLE_ENDIAN
};
-static AddressSpace *pnv_phb3_dma_iommu(PCIBus *bus, void *opaque, int devfn)
+static AddressSpace *pnv_phb3_dma_iommu(PCIBus *bus, void *opaque, int devfn,
+ PCIBus *real_bus, int real_devfn)
{
PnvPHB3 *phb = opaque;
PnvPhb3DMASpace *ds;
@@ -1450,7 +1450,8 @@ static PnvPhb4DMASpace *pnv_phb4_dma_find(PnvPHB4 *phb, PCIBus *bus, int devfn)
return ds;
}
-static AddressSpace *pnv_phb4_dma_iommu(PCIBus *bus, void *opaque, int devfn)
+static AddressSpace *pnv_phb4_dma_iommu(PCIBus *bus, void *opaque, int devfn,
+ PCIBus *real_bus, int real_devfn)
{
PnvPHB4 *phb = opaque;
PnvPhb4DMASpace *ds;
@@ -428,7 +428,8 @@ static void e500_pcihost_bridge_realize(PCIDevice *d, Error **errp)
}
static AddressSpace *e500_pcihost_set_iommu(PCIBus *bus, void *opaque,
- int devfn)
+ int devfn, PCIBus *real_bus,
+ int real_devfn)
{
PPCE500PCIState *s = opaque;
@@ -216,7 +216,8 @@ static void raven_set_irq(void *opaque, int irq_num, int level)
}
static AddressSpace *raven_pcihost_set_iommu(PCIBus *bus, void *opaque,
- int devfn)
+ int devfn, PCIBus *real_bus,
+ int real_devfn)
{
PREPPCIState *s = opaque;
@@ -105,7 +105,8 @@ static inline void sabre_clear_request(SabreState *s, unsigned int irq_num)
s->irq_request = NO_IRQ_REQUEST;
}
-static AddressSpace *sabre_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
+static AddressSpace *sabre_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn,
+ PCIBus *real_bus, int real_devfn)
{
IOMMUState *is = opaque;
@@ -2719,7 +2719,8 @@ AddressSpace *pci_device_iommu_address_space(PCIDevice *dev)
}
if (!pci_bus_bypass_iommu(bus) && iommu_bus->iommu_ops) {
return iommu_bus->iommu_ops->get_address_space(bus,
- iommu_bus->iommu_opaque, devfn);
+ iommu_bus->iommu_opaque, devfn,
+ pci_get_bus(dev), dev->devfn);
}
return &address_space_memory;
}
@@ -442,7 +442,8 @@ static void ppc440_pcix_set_irq(void *opaque, int irq_num, int level)
qemu_set_irq(*pci_irq, level);
}
-static AddressSpace *ppc440_pcix_set_iommu(PCIBus *b, void *opaque, int devfn)
+static AddressSpace *ppc440_pcix_set_iommu(PCIBus *b, void *opaque, int devfn,
+ PCIBus *real_bus, int real_devfn)
{
PPC440PCIXState *s = opaque;
@@ -773,7 +773,8 @@ static const MemoryRegionOps spapr_msi_ops = {
/*
* PHB PCI device
*/
-static AddressSpace *spapr_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
+static AddressSpace *spapr_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn,
+ PCIBus *real_bus, int real_devfn)
{
SpaprPhbState *phb = opaque;
@@ -37,7 +37,8 @@
*/
static AddressSpace *remote_iommu_find_add_as(PCIBus *pci_bus,
- void *opaque, int devfn)
+ void *opaque, int devfn,
+ PCIBus *real_bus, int real_devfn)
{
RemoteIommu *iommu = opaque;
RemoteIommuElem *elem = NULL;
@@ -644,7 +644,8 @@ static S390PCIIOMMU *s390_pci_get_iommu(S390pciState *s, PCIBus *bus,
return iommu;
}
-static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
+static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn,
+ PCIBus *real_bus, int real_devfn)
{
S390pciState *s = opaque;
S390PCIIOMMU *iommu = s390_pci_get_iommu(s, bus, devfn);
@@ -395,7 +395,8 @@ static void add_prop_resv_regions(IOMMUDevice *sdev)
}
static AddressSpace *virtio_iommu_find_add_as(PCIBus *bus, void *opaque,
- int devfn)
+ int devfn, PCIBus *real_bus,
+ int real_devfn)
{
VirtIOIOMMU *s = opaque;
IOMMUPciBus *sbus = g_hash_table_lookup(s->as_by_busptr, bus);
This adds PCI device's real bus and devfn to API get_address_space(), for vIOMMU which also wants real BDF, i.e., virtio-iommu. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> --- include/hw/pci/pci.h | 11 ++++++++--- hw/alpha/typhoon.c | 3 ++- hw/arm/smmu-common.c | 3 ++- hw/i386/amd_iommu.c | 6 ++++-- hw/i386/intel_iommu.c | 6 ++++-- hw/pci-host/astro.c | 3 ++- hw/pci-host/designware.c | 3 ++- hw/pci-host/dino.c | 3 ++- hw/pci-host/pnv_phb3.c | 3 ++- hw/pci-host/pnv_phb4.c | 3 ++- hw/pci-host/ppce500.c | 3 ++- hw/pci-host/raven.c | 3 ++- hw/pci-host/sabre.c | 3 ++- hw/pci/pci.c | 3 ++- hw/ppc/ppc440_pcix.c | 3 ++- hw/ppc/spapr_pci.c | 3 ++- hw/remote/iommu.c | 3 ++- hw/s390x/s390-pci-bus.c | 3 ++- hw/virtio/virtio-iommu.c | 3 ++- 19 files changed, 48 insertions(+), 23 deletions(-)