From patchwork Mon Feb 19 08:29:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 13562346 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CBBC7C48BC3 for ; Mon, 19 Feb 2024 08:34:47 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rbz45-00030M-Lb; Mon, 19 Feb 2024 03:31:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rbz43-0002uR-PN; Mon, 19 Feb 2024 03:31:51 -0500 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rbz42-0002Um-1v; Mon, 19 Feb 2024 03:31:51 -0500 Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-1dba6b9b060so17021685ad.1; Mon, 19 Feb 2024 00:31:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1708331508; x=1708936308; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=q36jhjRJi9//Rq92Z4CXsjy5rE5fVHQHoeYIuEypDgo=; b=ScNZg9K4XF2Opzmuxb6Hv1TrIZF3dLHcsYQ8xnKhpDVifd5ufB3vWFDZ3y1t86sU4t 7bqL7VEqGomtfzHLib6kuO/eh4GkEOJMeOm9KPoHlIQIIv3td50TFhfowSjnTFeJefMm x4bF6TpjG02ULU/+rr21kwBm/41wGN1Kw5HhpFXqAU9aLoQ1qNe2YzpxLBido6oHJAqN pkQybquxfuy+HwPTGxlqqjo3Wb0EbRxyUp3odvOlVtiVO1LcpbmesIMHzRwY4uYJZvIs JFh6PW3DOlGjKw1eGLbh1V9joJnewFjl2un9sePVpoLd4F1cDdAOEwx+ghR+lgbqzzLW Zc9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708331508; x=1708936308; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=q36jhjRJi9//Rq92Z4CXsjy5rE5fVHQHoeYIuEypDgo=; b=p8wSKHCOCCBQDO78YY1JrTTuwrsNMAeVbRKVpSwM5Ea+je0d6Z2Okc/3N0npI2JuZD Yqw9NU+5dagLP6opUuxPGLjzvv9BCI1PRPpOT5C6a8RqFvTVOaeOWwha76wBOUL27g+4 lLP0O05pDA4Mjq0coqhe42NgB74lmlwi3SYE9fFGe9ZlC2IkoZc8Td684HpVN4Mr9m5D 8vfumDhBNKCEadru6rZ1kqzyX83+VxKNZWA+BEuzsKlXKfsggFtwZQMqSnEzObqOss7w XuP8axuVB1T4T8hHVlnQwcuXzA+cwrnbCaSj9DT44fK8QpzaLo1EymQ5TfMerhia46vd xAjQ== X-Forwarded-Encrypted: i=1; AJvYcCUCqnUDJx7UgaKDCblzeTKAlNdRfWLVWnJbOOwhBbRSyQ8e4mjx6lJWM92xZ29uvfPPPyHkdaAP69BN54wzotlki8hk X-Gm-Message-State: AOJu0YwvkNKN4RAW3Eqvx+k8ECHCodal1ZlaPGnoGbu4JmjOz6irOG2T QTsPQghjIZ9hOBLHG+IJMS6xSNF4h3iiJA8NBWOwJeAjD8eqAW3O/D1Tzrfm X-Google-Smtp-Source: AGHT+IF4lJ64NFpUamuEUdgsQKaMYsNwLA5DqKiAF8lScvDTnlp+Bi58I2JwdCHGFdSCixqgyKLPOg== X-Received: by 2002:a17:902:f7d1:b0:1d8:ff72:eef8 with SMTP id h17-20020a170902f7d100b001d8ff72eef8mr15963505plw.18.1708331507885; Mon, 19 Feb 2024 00:31:47 -0800 (PST) Received: from wheely.local0.net ([1.146.38.93]) by smtp.gmail.com with ESMTPSA id mo7-20020a1709030a8700b001db5ecd115bsm3838348plb.276.2024.02.19.00.31.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Feb 2024 00:31:47 -0800 (PST) From: Nicholas Piggin To: qemu-devel@nongnu.org Cc: Nicholas Piggin , qemu-ppc@nongnu.org, Daniel Henrique Barboza , =?utf-8?q?C=C3=A9dric_Le_G?= =?utf-8?q?oater?= , Harsh Prateek Bora , Glenn Miles , Andrew Jeffery Subject: [PULL 24/49] misc/pca9552: Let external devices set pca9552 inputs Date: Mon, 19 Feb 2024 18:29:13 +1000 Message-ID: <20240219082938.238302-25-npiggin@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240219082938.238302-1-npiggin@gmail.com> References: <20240219082938.238302-1-npiggin@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=npiggin@gmail.com; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Glenn Miles Allow external devices to drive pca9552 input pins by adding input GPIO's to the model. This allows a device to connect its output GPIO's to the pca9552 input GPIO's. In order for an external device to set the state of a pca9552 pin, the pin must first be configured for high impedance (LED is off). If the pca9552 pin is configured to drive the pin low (LED is on), then external input will be ignored. Here is a table describing the logical state of a pca9552 pin given the state being driven by the pca9552 and an external device: PCA9552 Configured State | Hi-Z | Low | ------+------+-----+ External Hi-Z | Hi | Low | Device ------+------+-----+ State Low | Low | Low | ------+------+-----+ Reviewed-by: Andrew Jeffery Signed-off-by: Glenn Miles Signed-off-by: Nicholas Piggin --- hw/misc/pca9552.c | 50 +++++++++++++++++++++++++++++++++------ include/hw/misc/pca9552.h | 3 ++- 2 files changed, 45 insertions(+), 8 deletions(-) diff --git a/hw/misc/pca9552.c b/hw/misc/pca9552.c index f00a149d61..2ae13af35e 100644 --- a/hw/misc/pca9552.c +++ b/hw/misc/pca9552.c @@ -44,6 +44,8 @@ DECLARE_CLASS_CHECKERS(PCA955xClass, PCA955X, #define PCA9552_LED_OFF 0x1 #define PCA9552_LED_PWM0 0x2 #define PCA9552_LED_PWM1 0x3 +#define PCA9552_PIN_LOW 0x0 +#define PCA9552_PIN_HIZ 0x1 static const char *led_state[] = {"on", "off", "pwm0", "pwm1"}; @@ -110,22 +112,27 @@ static void pca955x_update_pin_input(PCA955xState *s) for (i = 0; i < k->pin_count; i++) { uint8_t input_reg = PCA9552_INPUT0 + (i / 8); - uint8_t input_shift = (i % 8); + uint8_t bit_mask = 1 << (i % 8); uint8_t config = pca955x_pin_get_config(s, i); + uint8_t old_value = s->regs[input_reg] & bit_mask; + uint8_t new_value; switch (config) { case PCA9552_LED_ON: /* Pin is set to 0V to turn on LED */ - qemu_set_irq(s->gpio[i], 0); - s->regs[input_reg] &= ~(1 << input_shift); + s->regs[input_reg] &= ~bit_mask; break; case PCA9552_LED_OFF: /* * Pin is set to Hi-Z to turn off LED and - * pullup sets it to a logical 1. + * pullup sets it to a logical 1 unless + * external device drives it low. */ - qemu_set_irq(s->gpio[i], 1); - s->regs[input_reg] |= 1 << input_shift; + if (s->ext_state[i] == PCA9552_PIN_LOW) { + s->regs[input_reg] &= ~bit_mask; + } else { + s->regs[input_reg] |= bit_mask; + } break; case PCA9552_LED_PWM0: case PCA9552_LED_PWM1: @@ -133,6 +140,12 @@ static void pca955x_update_pin_input(PCA955xState *s) default: break; } + + /* update irq state only if pin state changed */ + new_value = s->regs[input_reg] & bit_mask; + if (new_value != old_value) { + qemu_set_irq(s->gpio_out[i], !!new_value); + } } } @@ -340,6 +353,7 @@ static const VMStateDescription pca9552_vmstate = { VMSTATE_UINT8(len, PCA955xState), VMSTATE_UINT8(pointer, PCA955xState), VMSTATE_UINT8_ARRAY(regs, PCA955xState, PCA955X_NR_REGS), + VMSTATE_UINT8_ARRAY(ext_state, PCA955xState, PCA955X_PIN_COUNT_MAX), VMSTATE_I2C_SLAVE(i2c, PCA955xState), VMSTATE_END_OF_LIST() } @@ -358,6 +372,7 @@ static void pca9552_reset(DeviceState *dev) s->regs[PCA9552_LS2] = 0x55; s->regs[PCA9552_LS3] = 0x55; + memset(s->ext_state, PCA9552_PIN_HIZ, PCA955X_PIN_COUNT_MAX); pca955x_update_pin_input(s); s->pointer = 0xFF; @@ -380,6 +395,26 @@ static void pca955x_initfn(Object *obj) } } +static void pca955x_set_ext_state(PCA955xState *s, int pin, int level) +{ + if (s->ext_state[pin] != level) { + uint16_t pins_status = pca955x_pins_get_status(s); + s->ext_state[pin] = level; + pca955x_update_pin_input(s); + pca955x_display_pins_status(s, pins_status); + } +} + +static void pca955x_gpio_in_handler(void *opaque, int pin, int level) +{ + + PCA955xState *s = PCA955X(opaque); + PCA955xClass *k = PCA955X_GET_CLASS(s); + + assert((pin >= 0) && (pin < k->pin_count)); + pca955x_set_ext_state(s, pin, level); +} + static void pca955x_realize(DeviceState *dev, Error **errp) { PCA955xClass *k = PCA955X_GET_CLASS(dev); @@ -389,7 +424,8 @@ static void pca955x_realize(DeviceState *dev, Error **errp) s->description = g_strdup("pca-unspecified"); } - qdev_init_gpio_out(dev, s->gpio, k->pin_count); + qdev_init_gpio_out(dev, s->gpio_out, k->pin_count); + qdev_init_gpio_in(dev, pca955x_gpio_in_handler, k->pin_count); } static Property pca955x_properties[] = { diff --git a/include/hw/misc/pca9552.h b/include/hw/misc/pca9552.h index b6f4e264fe..c36525f0c3 100644 --- a/include/hw/misc/pca9552.h +++ b/include/hw/misc/pca9552.h @@ -30,7 +30,8 @@ struct PCA955xState { uint8_t pointer; uint8_t regs[PCA955X_NR_REGS]; - qemu_irq gpio[PCA955X_PIN_COUNT_MAX]; + qemu_irq gpio_out[PCA955X_PIN_COUNT_MAX]; + uint8_t ext_state[PCA955X_PIN_COUNT_MAX]; char *description; /* For debugging purpose only */ };