| Message ID | 20240220110907.10479-1-frank.chang@sifive.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/riscv: Add missing include guard in pmu.h | expand |
On 20/2/24 12:08, frank.chang@sifive.com wrote: > From: Frank Chang <frank.chang@sifive.com> > > Add missing include guard in pmu.h to avoid the problem of double > inclusion. > In case it needs to be backported to stable releases: Fixes: 3780e33732 ("target/riscv: Support mcycle/minstret write operation") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> > Signed-off-by: Frank Chang <frank.chang@sifive.com> > --- > target/riscv/pmu.h | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/target/riscv/pmu.h b/target/riscv/pmu.h > index 505fc850d3..7c0ad661e0 100644 > --- a/target/riscv/pmu.h > +++ b/target/riscv/pmu.h > @@ -16,6 +16,9 @@ > * this program. If not, see <http://www.gnu.org/licenses/>. > */ > > +#ifndef RISCV_PMU_H > +#define RISCV_PMU_H > + > #include "cpu.h" > #include "qapi/error.h" > > @@ -31,3 +34,5 @@ int riscv_pmu_incr_ctr(RISCVCPU *cpu, enum riscv_pmu_event_idx event_idx); > void riscv_pmu_generate_fdt_node(void *fdt, uint32_t cmask, char *pmu_name); > int riscv_pmu_setup_timer(CPURISCVState *env, uint64_t value, > uint32_t ctr_idx); > + > +#endif /* RISCV_PMU_H */
On 2/20/24 08:08, frank.chang@sifive.com wrote: > From: Frank Chang <frank.chang@sifive.com> > > Add missing include guard in pmu.h to avoid the problem of double > inclusion. > > Signed-off-by: Frank Chang <frank.chang@sifive.com> > --- Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > target/riscv/pmu.h | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/target/riscv/pmu.h b/target/riscv/pmu.h > index 505fc850d3..7c0ad661e0 100644 > --- a/target/riscv/pmu.h > +++ b/target/riscv/pmu.h > @@ -16,6 +16,9 @@ > * this program. If not, see <http://www.gnu.org/licenses/>. > */ > > +#ifndef RISCV_PMU_H > +#define RISCV_PMU_H > + > #include "cpu.h" > #include "qapi/error.h" > > @@ -31,3 +34,5 @@ int riscv_pmu_incr_ctr(RISCVCPU *cpu, enum riscv_pmu_event_idx event_idx); > void riscv_pmu_generate_fdt_node(void *fdt, uint32_t cmask, char *pmu_name); > int riscv_pmu_setup_timer(CPURISCVState *env, uint64_t value, > uint32_t ctr_idx); > + > +#endif /* RISCV_PMU_H */
On 2/20/24 08:20, Daniel Henrique Barboza wrote: > > > On 2/20/24 08:08, frank.chang@sifive.com wrote: >> From: Frank Chang <frank.chang@sifive.com> >> >> Add missing include guard in pmu.h to avoid the problem of double >> inclusion. >> >> Signed-off-by: Frank Chang <frank.chang@sifive.com> >> --- > > Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > >> target/riscv/pmu.h | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/target/riscv/pmu.h b/target/riscv/pmu.h >> index 505fc850d3..7c0ad661e0 100644 >> --- a/target/riscv/pmu.h >> +++ b/target/riscv/pmu.h >> @@ -16,6 +16,9 @@ >> * this program. If not, see <http://www.gnu.org/licenses/>. >> */ >> +#ifndef RISCV_PMU_H >> +#define RISCV_PMU_H >> + >> #include "cpu.h" >> #include "qapi/error.h" >> @@ -31,3 +34,5 @@ int riscv_pmu_incr_ctr(RISCVCPU *cpu, enum >> riscv_pmu_event_idx event_idx); >> void riscv_pmu_generate_fdt_node(void *fdt, uint32_t cmask, char >> *pmu_name); >> int riscv_pmu_setup_timer(CPURISCVState *env, uint64_t value, >> uint32_t ctr_idx); >> + >> +#endif /* RISCV_PMU_H */ > Oops. Thanks for the fix. Reviewed-by: Atish Patra <atishp@rivosinc.com>
On Tue, Feb 20, 2024 at 9:09 PM <frank.chang@sifive.com> wrote: > > From: Frank Chang <frank.chang@sifive.com> > > Add missing include guard in pmu.h to avoid the problem of double > inclusion. > > Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/pmu.h | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/target/riscv/pmu.h b/target/riscv/pmu.h > index 505fc850d3..7c0ad661e0 100644 > --- a/target/riscv/pmu.h > +++ b/target/riscv/pmu.h > @@ -16,6 +16,9 @@ > * this program. If not, see <http://www.gnu.org/licenses/>. > */ > > +#ifndef RISCV_PMU_H > +#define RISCV_PMU_H > + > #include "cpu.h" > #include "qapi/error.h" > > @@ -31,3 +34,5 @@ int riscv_pmu_incr_ctr(RISCVCPU *cpu, enum riscv_pmu_event_idx event_idx); > void riscv_pmu_generate_fdt_node(void *fdt, uint32_t cmask, char *pmu_name); > int riscv_pmu_setup_timer(CPURISCVState *env, uint64_t value, > uint32_t ctr_idx); > + > +#endif /* RISCV_PMU_H */ > -- > 2.43.0 > >
On Tue, Feb 20, 2024 at 9:09 PM <frank.chang@sifive.com> wrote: > > From: Frank Chang <frank.chang@sifive.com> > > Add missing include guard in pmu.h to avoid the problem of double > inclusion. > > Signed-off-by: Frank Chang <frank.chang@sifive.com> Thanks! Applied to riscv-to-apply.next Alistair > --- > target/riscv/pmu.h | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/target/riscv/pmu.h b/target/riscv/pmu.h > index 505fc850d3..7c0ad661e0 100644 > --- a/target/riscv/pmu.h > +++ b/target/riscv/pmu.h > @@ -16,6 +16,9 @@ > * this program. If not, see <http://www.gnu.org/licenses/>. > */ > > +#ifndef RISCV_PMU_H > +#define RISCV_PMU_H > + > #include "cpu.h" > #include "qapi/error.h" > > @@ -31,3 +34,5 @@ int riscv_pmu_incr_ctr(RISCVCPU *cpu, enum riscv_pmu_event_idx event_idx); > void riscv_pmu_generate_fdt_node(void *fdt, uint32_t cmask, char *pmu_name); > int riscv_pmu_setup_timer(CPURISCVState *env, uint64_t value, > uint32_t ctr_idx); > + > +#endif /* RISCV_PMU_H */ > -- > 2.43.0 > >
diff --git a/target/riscv/pmu.h b/target/riscv/pmu.h index 505fc850d3..7c0ad661e0 100644 --- a/target/riscv/pmu.h +++ b/target/riscv/pmu.h @@ -16,6 +16,9 @@ * this program. If not, see <http://www.gnu.org/licenses/>. */ +#ifndef RISCV_PMU_H +#define RISCV_PMU_H + #include "cpu.h" #include "qapi/error.h" @@ -31,3 +34,5 @@ int riscv_pmu_incr_ctr(RISCVCPU *cpu, enum riscv_pmu_event_idx event_idx); void riscv_pmu_generate_fdt_node(void *fdt, uint32_t cmask, char *pmu_name); int riscv_pmu_setup_timer(CPURISCVState *env, uint64_t value, uint32_t ctr_idx); + +#endif /* RISCV_PMU_H */