| Message ID | 20240223022119.41255-3-alvinga@andestech.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | RISC-V: Modularize common match conditions for trigger | expand |
On Fri, Feb 23, 2024 at 12:22 PM Alvin Chang via <qemu-devel@nongnu.org> wrote: > > We have implemented trigger_common_match(), which checks if the enabled > privilege levels of the trigger match CPU's current privilege level. > Remove the related code in riscv_cpu_debug_check_breakpoint() and invoke > trigger_common_match() to check the privilege levels of the type 2 and > type 6 triggers for the breakpoints. > > This commit also changes the behavior of looping the triggers. In > previous implementation, if we have a type 2 trigger and > env->virt_enabled is true, we directly return false to stop the loop. > Now we keep looping all the triggers until we find a matched trigger. > > Only the execution bit and the executed PC should be futher checked in > riscv_cpu_debug_check_breakpoint(). > > Signed-off-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/debug.c | 26 ++++++-------------------- > 1 file changed, 6 insertions(+), 20 deletions(-) > > diff --git a/target/riscv/debug.c b/target/riscv/debug.c > index 3891236b82..b7b0fa8945 100644 > --- a/target/riscv/debug.c > +++ b/target/riscv/debug.c > @@ -855,21 +855,17 @@ bool riscv_cpu_debug_check_breakpoint(CPUState *cs) > for (i = 0; i < RV_MAX_TRIGGERS; i++) { > trigger_type = get_trigger_type(env, i); > > + if (!trigger_common_match(env, trigger_type, i)) { > + continue; > + } > + > switch (trigger_type) { > case TRIGGER_TYPE_AD_MATCH: > - /* type 2 trigger cannot be fired in VU/VS mode */ > - if (env->virt_enabled) { > - return false; > - } > - > ctrl = env->tdata1[i]; > pc = env->tdata2[i]; > > if ((ctrl & TYPE2_EXEC) && (bp->pc == pc)) { > - /* check U/S/M bit against current privilege level */ > - if ((ctrl >> 3) & BIT(env->priv)) { > - return true; > - } > + return true; > } > break; > case TRIGGER_TYPE_AD_MATCH6: > @@ -877,17 +873,7 @@ bool riscv_cpu_debug_check_breakpoint(CPUState *cs) > pc = env->tdata2[i]; > > if ((ctrl & TYPE6_EXEC) && (bp->pc == pc)) { > - if (env->virt_enabled) { > - /* check VU/VS bit against current privilege level */ > - if ((ctrl >> 23) & BIT(env->priv)) { > - return true; > - } > - } else { > - /* check U/S/M bit against current privilege level */ > - if ((ctrl >> 3) & BIT(env->priv)) { > - return true; > - } > - } > + return true; > } > break; > default: > -- > 2.34.1 > >
diff --git a/target/riscv/debug.c b/target/riscv/debug.c index 3891236b82..b7b0fa8945 100644 --- a/target/riscv/debug.c +++ b/target/riscv/debug.c @@ -855,21 +855,17 @@ bool riscv_cpu_debug_check_breakpoint(CPUState *cs) for (i = 0; i < RV_MAX_TRIGGERS; i++) { trigger_type = get_trigger_type(env, i); + if (!trigger_common_match(env, trigger_type, i)) { + continue; + } + switch (trigger_type) { case TRIGGER_TYPE_AD_MATCH: - /* type 2 trigger cannot be fired in VU/VS mode */ - if (env->virt_enabled) { - return false; - } - ctrl = env->tdata1[i]; pc = env->tdata2[i]; if ((ctrl & TYPE2_EXEC) && (bp->pc == pc)) { - /* check U/S/M bit against current privilege level */ - if ((ctrl >> 3) & BIT(env->priv)) { - return true; - } + return true; } break; case TRIGGER_TYPE_AD_MATCH6: @@ -877,17 +873,7 @@ bool riscv_cpu_debug_check_breakpoint(CPUState *cs) pc = env->tdata2[i]; if ((ctrl & TYPE6_EXEC) && (bp->pc == pc)) { - if (env->virt_enabled) { - /* check VU/VS bit against current privilege level */ - if ((ctrl >> 23) & BIT(env->priv)) { - return true; - } - } else { - /* check U/S/M bit against current privilege level */ - if ((ctrl >> 3) & BIT(env->priv)) { - return true; - } - } + return true; } break; default:
We have implemented trigger_common_match(), which checks if the enabled privilege levels of the trigger match CPU's current privilege level. Remove the related code in riscv_cpu_debug_check_breakpoint() and invoke trigger_common_match() to check the privilege levels of the type 2 and type 6 triggers for the breakpoints. This commit also changes the behavior of looping the triggers. In previous implementation, if we have a type 2 trigger and env->virt_enabled is true, we directly return false to stop the loop. Now we keep looping all the triggers until we find a matched trigger. Only the execution bit and the executed PC should be futher checked in riscv_cpu_debug_check_breakpoint(). Signed-off-by: Alvin Chang <alvinga@andestech.com> --- target/riscv/debug.c | 26 ++++++-------------------- 1 file changed, 6 insertions(+), 20 deletions(-)