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[3/3] target/hppa: mask CR_SAR register writes to 5/6 bit in gdbstub

Message ID 20240228201434.1515893-4-svens@stackframe.org (mailing list archive)
State New, archived
Headers show
Series 64 Bit support for hppa gdbstub | expand

Commit Message

Sven Schnelle Feb. 28, 2024, 8:14 p.m. UTC 
Signed-off-by: Sven Schnelle <svens@stackframe.org>
---
 target/hppa/gdbstub.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Richard Henderson Feb. 29, 2024, 6:36 p.m. UTC | #1 
On 2/28/24 10:14, Sven Schnelle wrote:
> Signed-off-by: Sven Schnelle <svens@stackframe.org>
> ---
>   target/hppa/gdbstub.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/hppa/gdbstub.c b/target/hppa/gdbstub.c
> index a5b2c80c07..049b2d6381 100644
> --- a/target/hppa/gdbstub.c
> +++ b/target/hppa/gdbstub.c
> @@ -184,7 +184,7 @@ int hppa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
>           env->gr[n] = val;
>           break;
>       case 32:
> -        env->cr[CR_SAR] = val;
> +        env->cr[CR_SAR] = val & (hppa_is_pa20(env) ? 63 : 31);
>           break;
>       case 33:
>           env->iaoq_f = val;

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
diff mbox series

Patch

diff --git a/target/hppa/gdbstub.c b/target/hppa/gdbstub.c
index a5b2c80c07..049b2d6381 100644
--- a/target/hppa/gdbstub.c
+++ b/target/hppa/gdbstub.c
@@ -184,7 +184,7 @@  int hppa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
         env->gr[n] = val;
         break;
     case 32:
-        env->cr[CR_SAR] = val;
+        env->cr[CR_SAR] = val & (hppa_is_pa20(env) ? 63 : 31);
         break;
     case 33:
         env->iaoq_f = val;