diff mbox series

[33/41] target/sparc: Add feature bit for VIS4

Message ID 20240302051601.53649-34-richard.henderson@linaro.org (mailing list archive)
State New, archived
Headers show
Series target/sparc: Implement VIS4 | expand

Commit Message

Richard Henderson March 2, 2024, 5:15 a.m. UTC 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/sparc/translate.c       | 2 ++
 target/sparc/cpu-feature.h.inc | 1 +
 2 files changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 56ee3927af..77b53cbf3b 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -2402,6 +2402,7 @@  static int extract_qfpreg(DisasContext *dc, int x)
 # define avail_VIS2(C)    ((C)->def->features & CPU_FEATURE_VIS2)
 # define avail_VIS3(C)    ((C)->def->features & CPU_FEATURE_VIS3)
 # define avail_VIS3B(C)   avail_VIS3(C)
+# define avail_VIS4(C)    ((C)->def->features & CPU_FEATURE_VIS4)
 #else
 # define avail_32(C)      true
 # define avail_ASR17(C)   ((C)->def->features & CPU_FEATURE_ASR17)
@@ -2418,6 +2419,7 @@  static int extract_qfpreg(DisasContext *dc, int x)
 # define avail_VIS2(C)    false
 # define avail_VIS3(C)    false
 # define avail_VIS3B(C)   false
+# define avail_VIS4(C)    false
 #endif
 
 /* Default case for non jump instructions. */
diff --git a/target/sparc/cpu-feature.h.inc b/target/sparc/cpu-feature.h.inc
index e2e6de9144..be81005237 100644
--- a/target/sparc/cpu-feature.h.inc
+++ b/target/sparc/cpu-feature.h.inc
@@ -15,3 +15,4 @@  FEATURE(CASA)
 FEATURE(FMAF)
 FEATURE(VIS3)
 FEATURE(IMA)
+FEATURE(VIS4)