diff mbox series

[v2,2/9] Hexagon (target/hexagon) Mark new_read_idx in trans functions

Message ID 20240307032327.4799-3-ltaylorsimpson@gmail.com (mailing list archive)
State New, archived
Headers show
Series Clean up .new decode and scripts | expand

Commit Message

Taylor Simpson March 7, 2024, 3:23 a.m. UTC
Check that the value matches opcode_reginfo

Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
---
 target/hexagon/insn.h                   |  3 ++-
 target/hexagon/decode.c                 |  2 ++
 target/hexagon/mmvec/decode_ext_mmvec.c |  2 ++
 target/hexagon/gen_trans_funcs.py       | 15 ++++++++++-----
 4 files changed, 16 insertions(+), 6 deletions(-)

Comments

Brian Cain March 29, 2024, 1:05 a.m. UTC | #1
> -----Original Message-----
> From: Taylor Simpson <ltaylorsimpson@gmail.com>
> Sent: Wednesday, March 6, 2024 9:23 PM
> To: qemu-devel@nongnu.org
> Cc: Brian Cain <bcain@quicinc.com>; Matheus Bernardino (QUIC)
> <quic_mathbern@quicinc.com>; Sid Manning <sidneym@quicinc.com>;
> Marco Liebel (QUIC) <quic_mliebel@quicinc.com>;
> richard.henderson@linaro.org; philmd@linaro.org; ale@rev.ng; anjo@rev.ng;
> ltaylorsimpson@gmail.com
> Subject: [PATCH v2 2/9] Hexagon (target/hexagon) Mark new_read_idx in
> trans functions
> 
> WARNING: This email originated from outside of Qualcomm. Please be wary
> of any links or attachments, and do not enable macros.
> 
> Check that the value matches opcode_reginfo
> 
> Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
> ---

Reviewed-by: Brian Cain <bcain@quicinc.com>


>  target/hexagon/insn.h                   |  3 ++-
>  target/hexagon/decode.c                 |  2 ++
>  target/hexagon/mmvec/decode_ext_mmvec.c |  2 ++
>  target/hexagon/gen_trans_funcs.py       | 15 ++++++++++-----
>  4 files changed, 16 insertions(+), 6 deletions(-)
> 
> diff --git a/target/hexagon/insn.h b/target/hexagon/insn.h
> index 3e7a22c91e..36502bf056 100644
> --- a/target/hexagon/insn.h
> +++ b/target/hexagon/insn.h
> @@ -1,5 +1,5 @@
>  /*
> - *  Copyright(c) 2019-2022 Qualcomm Innovation Center, Inc. All Rights
> Reserved.
> + *  Copyright(c) 2019-2024 Qualcomm Innovation Center, Inc. All Rights
> Reserved.
>   *
>   *  This program is free software; you can redistribute it and/or modify
>   *  it under the terms of the GNU General Public License as published by
> @@ -39,6 +39,7 @@ struct Instruction {
>      uint32_t slot:3;
>      uint32_t which_extended:1;    /* If has an extender, which immediate */
>      uint32_t new_value_producer_slot:4;
> +    int32_t new_read_idx;
> 
>      bool part1;              /*
>                                * cmp-jumps are split into two insns.
> diff --git a/target/hexagon/decode.c b/target/hexagon/decode.c
> index a40210ca1e..4595e30384 100644
> --- a/target/hexagon/decode.c
> +++ b/target/hexagon/decode.c
> @@ -131,6 +131,8 @@ decode_fill_newvalue_regno(Packet *packet)
>                  use_regidx = strchr(opcode_reginfo[use_opcode], 's') -
>                      opcode_reginfo[use_opcode];
>              }
> +            g_assert(packet->insn[i].new_read_idx != -1 &&
> +                     packet->insn[i].new_read_idx == use_regidx);
> 
>              /*
>               * What's encoded at the N-field is the offset to who's producing
> diff --git a/target/hexagon/mmvec/decode_ext_mmvec.c
> b/target/hexagon/mmvec/decode_ext_mmvec.c
> index 202d84c7c0..e9007f5d71 100644
> --- a/target/hexagon/mmvec/decode_ext_mmvec.c
> +++ b/target/hexagon/mmvec/decode_ext_mmvec.c
> @@ -41,6 +41,8 @@ check_new_value(Packet *pkt)
>              GET_ATTRIB(use_opcode, A_STORE)) {
>              int use_regidx = strchr(opcode_reginfo[use_opcode], 's') -
>                  opcode_reginfo[use_opcode];
> +            g_assert(pkt->insn[i].new_read_idx != -1 &&
> +                     pkt->insn[i].new_read_idx == use_regidx);
>              /*
>               * What's encoded at the N-field is the offset to who's producing
>               * the value.
> diff --git a/target/hexagon/gen_trans_funcs.py
> b/target/hexagon/gen_trans_funcs.py
> index 53e844a44b..8acecdb993 100755
> --- a/target/hexagon/gen_trans_funcs.py
> +++ b/target/hexagon/gen_trans_funcs.py
> @@ -68,6 +68,7 @@ def mark_which_imm_extended(f, tag):
>  ##         insn->regno[0] = args->Rd;
>  ##         insn->regno[1] = args->Rs;
>  ##         insn->regno[2] = args->Rt;
> +##         insn->new_read_idx = -1;
>  ##         return true;
>  ##     }
>  ##
> @@ -84,14 +85,14 @@ def gen_trans_funcs(f):
>                  insn->opcode = {tag};
>          """))
> 
> -        regno = 0
> -        for reg in regs:
> -            reg_type = reg[0]
> -            reg_id = reg[1]
> +        new_read_idx = -1
> +        for regno, (reg_type, reg_id, *_) in enumerate(regs):
> +            reg = hex_common.get_register(tag, reg_type, reg_id)
>              f.write(code_fmt(f"""\
>                  insn->regno[{regno}] = args->{reg_type}{reg_id};
>              """))
> -            regno += 1
> +            if reg.is_read() and reg.is_new():
> +                new_read_idx = regno
> 
>          if len(imms) != 0:
>              mark_which_imm_extended(f, tag)
> @@ -112,6 +113,9 @@ def gen_trans_funcs(f):
>                      insn->immed[{immno}] = args->{imm_type}{imm_letter};
>                  """))
> 
> +        f.write(code_fmt(f"""\
> +            insn->new_read_idx = {new_read_idx};
> +        """))
>          f.write(textwrap.dedent(f"""\
>                  return true;
>              {close_curly}
> @@ -120,5 +124,6 @@ def gen_trans_funcs(f):
> 
>  if __name__ == "__main__":
>      hex_common.read_semantics_file(sys.argv[1])
> +    hex_common.init_registers()
>      with open(sys.argv[2], "w") as f:
>          gen_trans_funcs(f)
> --
> 2.34.1
diff mbox series

Patch

diff --git a/target/hexagon/insn.h b/target/hexagon/insn.h
index 3e7a22c91e..36502bf056 100644
--- a/target/hexagon/insn.h
+++ b/target/hexagon/insn.h
@@ -1,5 +1,5 @@ 
 /*
- *  Copyright(c) 2019-2022 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *  Copyright(c) 2019-2024 Qualcomm Innovation Center, Inc. All Rights Reserved.
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -39,6 +39,7 @@  struct Instruction {
     uint32_t slot:3;
     uint32_t which_extended:1;    /* If has an extender, which immediate */
     uint32_t new_value_producer_slot:4;
+    int32_t new_read_idx;
 
     bool part1;              /*
                               * cmp-jumps are split into two insns.
diff --git a/target/hexagon/decode.c b/target/hexagon/decode.c
index a40210ca1e..4595e30384 100644
--- a/target/hexagon/decode.c
+++ b/target/hexagon/decode.c
@@ -131,6 +131,8 @@  decode_fill_newvalue_regno(Packet *packet)
                 use_regidx = strchr(opcode_reginfo[use_opcode], 's') -
                     opcode_reginfo[use_opcode];
             }
+            g_assert(packet->insn[i].new_read_idx != -1 &&
+                     packet->insn[i].new_read_idx == use_regidx);
 
             /*
              * What's encoded at the N-field is the offset to who's producing
diff --git a/target/hexagon/mmvec/decode_ext_mmvec.c b/target/hexagon/mmvec/decode_ext_mmvec.c
index 202d84c7c0..e9007f5d71 100644
--- a/target/hexagon/mmvec/decode_ext_mmvec.c
+++ b/target/hexagon/mmvec/decode_ext_mmvec.c
@@ -41,6 +41,8 @@  check_new_value(Packet *pkt)
             GET_ATTRIB(use_opcode, A_STORE)) {
             int use_regidx = strchr(opcode_reginfo[use_opcode], 's') -
                 opcode_reginfo[use_opcode];
+            g_assert(pkt->insn[i].new_read_idx != -1 &&
+                     pkt->insn[i].new_read_idx == use_regidx);
             /*
              * What's encoded at the N-field is the offset to who's producing
              * the value.
diff --git a/target/hexagon/gen_trans_funcs.py b/target/hexagon/gen_trans_funcs.py
index 53e844a44b..8acecdb993 100755
--- a/target/hexagon/gen_trans_funcs.py
+++ b/target/hexagon/gen_trans_funcs.py
@@ -68,6 +68,7 @@  def mark_which_imm_extended(f, tag):
 ##         insn->regno[0] = args->Rd;
 ##         insn->regno[1] = args->Rs;
 ##         insn->regno[2] = args->Rt;
+##         insn->new_read_idx = -1;
 ##         return true;
 ##     }
 ##
@@ -84,14 +85,14 @@  def gen_trans_funcs(f):
                 insn->opcode = {tag};
         """))
 
-        regno = 0
-        for reg in regs:
-            reg_type = reg[0]
-            reg_id = reg[1]
+        new_read_idx = -1
+        for regno, (reg_type, reg_id, *_) in enumerate(regs):
+            reg = hex_common.get_register(tag, reg_type, reg_id)
             f.write(code_fmt(f"""\
                 insn->regno[{regno}] = args->{reg_type}{reg_id};
             """))
-            regno += 1
+            if reg.is_read() and reg.is_new():
+                new_read_idx = regno
 
         if len(imms) != 0:
             mark_which_imm_extended(f, tag)
@@ -112,6 +113,9 @@  def gen_trans_funcs(f):
                     insn->immed[{immno}] = args->{imm_type}{imm_letter};
                 """))
 
+        f.write(code_fmt(f"""\
+            insn->new_read_idx = {new_read_idx};
+        """))
         f.write(textwrap.dedent(f"""\
                 return true;
             {close_curly}
@@ -120,5 +124,6 @@  def gen_trans_funcs(f):
 
 if __name__ == "__main__":
     hex_common.read_semantics_file(sys.argv[1])
+    hex_common.init_registers()
     with open(sys.argv[2], "w") as f:
         gen_trans_funcs(f)