| Message ID | 20240308111152.2856137-1-alistair.francis@wdc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, 8 Mar 2024 at 11:13, Alistair Francis <alistair23@gmail.com> wrote: > > The following changes since commit 8f6330a807f2642dc2a3cdf33347aa28a4c00a87: > > Merge tag 'pull-maintainer-updates-060324-1' of https://gitlab.com/stsquad/qemu into staging (2024-03-06 16:56:20 +0000) > > are available in the Git repository at: > > https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20240308-1 > > for you to fetch changes up to 301876597112218c1e465ecc2b2fef6b27d5c27b: > > target/riscv: fix ACPI MCFG table (2024-03-08 21:00:37 +1000) > > ---------------------------------------------------------------- > RISC-V PR for 9.0 > > * Update $ra with current $pc in trans_cm_jalt > * Enable SPCR for SCPI virt machine > * Allow large kernels to boot by moving the initrd further away in RAM > * Sync hwprobe keys with kernel > * Named features riscv,isa, 'svade' rework > * FIX xATP_MODE validation > * Add missing include guard in pmu.h > * Add SRAT and SLIT ACPI tables > * libqos fixes and add a riscv machine > * Add Ztso extension > * Use 'zfa' instead of 'Zfa' > * Update KVM exts to Linux 6.8 > * move ratified/frozen exts to non-experimental > * Ensure mcountinhibit, mcounteren, scounteren, hcounteren are 32-bit > * mark_vs_dirty() before loads and stores > * Remove 'is_store' bool from load/store fns > * Fix shift count overflow > * Fix setipnum_le write emulation for APLIC MSI-mode > * Fix in_clrip[x] read emulation > * Fix privilege mode of G-stage translation for debugging > * Fix ACPI MCFG table for virt machine > Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/9.0 for any user-visible changes. -- PMM
The following changes since commit 8f6330a807f2642dc2a3cdf33347aa28a4c00a87: Merge tag 'pull-maintainer-updates-060324-1' of https://gitlab.com/stsquad/qemu into staging (2024-03-06 16:56:20 +0000) are available in the Git repository at: https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20240308-1 for you to fetch changes up to 301876597112218c1e465ecc2b2fef6b27d5c27b: target/riscv: fix ACPI MCFG table (2024-03-08 21:00:37 +1000) ---------------------------------------------------------------- RISC-V PR for 9.0 * Update $ra with current $pc in trans_cm_jalt * Enable SPCR for SCPI virt machine * Allow large kernels to boot by moving the initrd further away in RAM * Sync hwprobe keys with kernel * Named features riscv,isa, 'svade' rework * FIX xATP_MODE validation * Add missing include guard in pmu.h * Add SRAT and SLIT ACPI tables * libqos fixes and add a riscv machine * Add Ztso extension * Use 'zfa' instead of 'Zfa' * Update KVM exts to Linux 6.8 * move ratified/frozen exts to non-experimental * Ensure mcountinhibit, mcounteren, scounteren, hcounteren are 32-bit * mark_vs_dirty() before loads and stores * Remove 'is_store' bool from load/store fns * Fix shift count overflow * Fix setipnum_le write emulation for APLIC MSI-mode * Fix in_clrip[x] read emulation * Fix privilege mode of G-stage translation for debugging * Fix ACPI MCFG table for virt machine ---------------------------------------------------------------- Alexandre Ghiti (1): hw: riscv: Allow large kernels to boot by moving the initrd further away in RAM Andrew Jones (3): target/riscv: Reset henvcfg to zero target/riscv: Gate hardware A/D PTE bit updating target/riscv: Promote svade to a normal extension Anup Patel (2): hw/intc/riscv_aplic: Fix setipnum_le write emulation for APLIC MSI-mode hw/intc/riscv_aplic: Fix in_clrip[x] read emulation Christoph Müllner (4): linux-user/riscv: Add Zicboz extensions to hwprobe linux-user/riscv: Sync hwprobe keys with Linux linux-user/riscv: Add Ztso extension to hwprobe tests: riscv64: Use 'zfa' instead of 'Zfa' Daniel Henrique Barboza (12): target/riscv/tcg: set 'mmu' with 'satp' in cpu_set_profile() target/riscv: add riscv,isa to named features target/riscv: add remaining named features hw/riscv/virt.c: create '/soc/pci@...' fdt node earlier hw/riscv/virt.c: add virtio-iommu-pci hotplug support hw/riscv/virt.c: make aclint compatible with 'qtest' accel tests/libqos: add riscv/virt machine nodes linux-headers: Update to Linux v6.8-rc6 target/riscv/kvm: update KVM exts to Linux 6.8 target/riscv: move ratified/frozen exts to non-experimental trans_rvv.c.inc: mark_vs_dirty() before loads and stores trans_rvv.c.inc: remove 'is_store' bool from load/store fns Frank Chang (1): target/riscv: Add missing include guard in pmu.h Haibo Xu (1): hw/riscv/virt-acpi-build.c: Add SRAT and SLIT ACPI tables Hiroaki Yamamoto (1): target/riscv: Fix privilege mode of G-stage translation for debugging Ilya Chugin (1): target/riscv: fix ACPI MCFG table Irina Ryapolova (2): target/riscv: FIX xATP_MODE validation target/riscv: UPDATE xATP write CSR Jason Chien (1): target/riscv: Update $ra with current $pc in trans_cm_jalt() Palmer Dabbelt (1): RISC-V: Add support for Ztso Sia Jee Heng (2): hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location hw/riscv/virt-acpi-build.c: Generate SPCR table Vadim Shakirov (1): target/riscv: mcountinhibit, mcounteren, scounteren, hcounteren is 32-bit demin.han (1): target/riscv: Fix shift count overflow include/hw/acpi/acpi-defs.h | 33 ++++++ include/hw/acpi/aml-build.h | 4 + include/standard-headers/drm/drm_fourcc.h | 10 +- include/standard-headers/linux/ethtool.h | 41 +++++--- include/standard-headers/linux/virtio_config.h | 8 +- include/standard-headers/linux/virtio_pci.h | 68 ++++++++++++ include/standard-headers/linux/virtio_pmem.h | 7 ++ linux-headers/asm-generic/unistd.h | 15 ++- linux-headers/asm-mips/mman.h | 2 +- linux-headers/asm-mips/unistd_n32.h | 5 + linux-headers/asm-mips/unistd_n64.h | 5 + linux-headers/asm-mips/unistd_o32.h | 5 + linux-headers/asm-powerpc/unistd_32.h | 5 + linux-headers/asm-powerpc/unistd_64.h | 5 + linux-headers/asm-riscv/kvm.h | 40 +++++++ linux-headers/asm-s390/unistd_32.h | 5 + linux-headers/asm-s390/unistd_64.h | 5 + linux-headers/asm-x86/kvm.h | 3 + linux-headers/asm-x86/unistd_32.h | 5 + linux-headers/asm-x86/unistd_64.h | 5 + linux-headers/asm-x86/unistd_x32.h | 5 + linux-headers/linux/iommufd.h | 79 ++++++++++++++ linux-headers/linux/kvm.h | 140 +++++++++---------------- linux-headers/linux/userfaultfd.h | 29 ++++- linux-headers/linux/vfio.h | 1 + target/riscv/cpu.h | 8 +- target/riscv/cpu_cfg.h | 13 ++- target/riscv/pmu.h | 5 + hw/acpi/aml-build.c | 53 ++++++++++ hw/arm/virt-acpi-build.c | 68 +++++------- hw/intc/riscv_aplic.c | 37 +++++-- hw/riscv/boot.c | 12 +-- hw/riscv/virt-acpi-build.c | 103 +++++++++++++++++- hw/riscv/virt.c | 97 ++++++++++++----- linux-user/syscall.c | 104 ++++++++++++++++-- target/riscv/cpu.c | 94 +++++++++++------ target/riscv/cpu_helper.c | 21 +++- target/riscv/csr.c | 58 +++++----- target/riscv/kvm/kvm-cpu.c | 29 +++++ target/riscv/machine.c | 16 +-- target/riscv/tcg/tcg-cpu.c | 34 +++--- target/riscv/translate.c | 3 + target/riscv/vector_helper.c | 5 +- tests/qtest/libqos/riscv-virt-machine.c | 137 ++++++++++++++++++++++++ target/riscv/insn_trans/trans_rva.c.inc | 11 +- target/riscv/insn_trans/trans_rvi.c.inc | 16 ++- target/riscv/insn_trans/trans_rvv.c.inc | 97 +++++++++-------- target/riscv/insn_trans/trans_rvzce.c.inc | 6 +- tests/qtest/libqos/meson.build | 1 + tests/tcg/riscv64/Makefile.target | 2 +- 50 files changed, 1213 insertions(+), 347 deletions(-) create mode 100644 tests/qtest/libqos/riscv-virt-machine.c